IBM Power-Management Bindings
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=============================
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Linux running on baremetal POWER machines has access to the processor
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idle states. The description of these idle states is exposed via the
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node @power-mgt in the device-tree by the firmware.
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Definitions:
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----------------
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Typically each idle state has the following associated properties:
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- name: The name of the idle state as defined by the firmware.
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- flags: indicating some aspects of this idle states such as the
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extent of state-loss, whether timebase is stopped on this
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idle states and so on. The flag bits are as follows:
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- exit-latency: The latency involved in transitioning the state of the
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CPU from idle to running.
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- target-residency: The minimum time that the CPU needs to reside in
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this idle state in order to accrue power-savings
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benefit.
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Properties
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----------------
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The following properties provide details about the idle states. These
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properties are exposed as arrays. Each entry in the property array
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provides the value of that property for the idle state associated with
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the array index of that entry.
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If idle-states are defined, then the properties
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"ibm,cpu-idle-state-names" and "ibm,cpu-idle-state-flags" are
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required. The other properties are required unless mentioned
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otherwise. The length of all the property arrays must be the same.
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- ibm,cpu-idle-state-names:
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Array of strings containing the names of the idle states.
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- ibm,cpu-idle-state-flags:
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Array of unsigned 32-bit values containing the values of the
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flags associated with the the aforementioned idle-states. The
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flag bits are as follows:
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0x00000001 /* Decrementer would stop */
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0x00000002 /* Needs timebase restore */
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0x00001000 /* Restore GPRs like nap */
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0x00002000 /* Restore hypervisor resource from PACA pointer */
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0x00004000 /* Program PORE to restore PACA pointer */
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0x00010000 /* This is a nap state (POWER7,POWER8) */
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0x00020000 /* This is a fast-sleep state (POWER8)*/
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0x00040000 /* This is a winkle state (POWER8) */
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0x00080000 /* This is a fast-sleep state which requires a */
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/* software workaround for restoring the */
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/* timebase (POWER8) */
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0x00800000 /* This state uses SPR PMICR instruction */
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/* (POWER8)*/
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0x00100000 /* This is a fast stop state (POWER9) */
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0x00200000 /* This is a deep-stop state (POWER9) */
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- ibm,cpu-idle-state-latencies-ns:
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Array of unsigned 32-bit values containing the values of the
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exit-latencies (in ns) for the idle states in
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ibm,cpu-idle-state-names.
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- ibm,cpu-idle-state-residency-ns:
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Array of unsigned 32-bit values containing the values of the
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target-residency (in ns) for the idle states in
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ibm,cpu-idle-state-names. On POWER8 this is an optional
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property. If the property is absent, the target residency for
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the "Nap", "FastSleep" are defined to 10000 and 300000000
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respectively by the kernel. On POWER9 this property is required.
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- ibm,cpu-idle-state-psscr:
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Array of unsigned 64-bit values containing the values for the
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PSSCR for each of the idle states in ibm,cpu-idle-state-names.
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This property is required on POWER9 and absent on POWER8.
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- ibm,cpu-idle-state-psscr-mask:
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Array of unsigned 64-bit values containing the masks
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indicating which psscr fields are set in the corresponding
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entries of ibm,cpu-idle-state-psscr. This property is
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required on POWER9 and absent on POWER8.
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Whenever the firmware sets an entry in
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ibm,cpu-idle-state-psscr-mask value to 0xf, it implies that
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only the Requested Level (RL) field of the corresponding entry
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in ibm,cpu-idle-state-psscr should be considered by the
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kernel. For such idle states, the kernel would set the
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remaining fields of the psscr to the following sane-default
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values.
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- ESL and EC bits are to 1. So wakeup from any stop
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state will be at vector 0x100.
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- MTL and PSLL are set to the maximum allowed value as
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per the ISA, i.e. 15.
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- The Transition Rate, TR is set to the Maximum value
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3.
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For all the other values of the entry in
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ibm,cpu-idle-state-psscr-mask, the kernel expects all the
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psscr fields of the corresponding entry in
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ibm,cpu-idle-state-psscr to be correctly set by the firmware.
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- ibm,cpu-idle-state-pmicr:
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Array of unsigned 64-bit values containing the pmicr values
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for the idle states in ibm,cpu-idle-state-names. This 64-bit
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register value is to be set in pmicr for the corresponding
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state if the flag indicates that pmicr SPR should be set. This
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is an optional property on POWER8 and is absent on
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POWER9.
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- ibm,cpu-idle-state-pmicr-mask:
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Array of unsigned 64-bit values containing the mask indicating
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which of the fields of the PMICR are set in the corresponding
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entries in ibm,cpu-idle-state-pmicr. This is an optional
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property on POWER8 and is absent on POWER9.
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