# Copyright (c) 2016 Google, Inc
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# Written by Simon Glass <sjg@chromium.org>
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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# Entry-type module for 'u-boot'
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#
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import struct
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from entry import Entry
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from blob import Entry_blob
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FD_SIGNATURE = struct.pack('<L', 0x0ff0a55a)
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MAX_REGIONS = 5
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(REGION_DESCRIPTOR, REGION_BIOS, REGION_ME, REGION_GBE,
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REGION_PDATA) = range(5)
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class Region:
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def __init__(self, data, frba, region_num):
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pos = frba + region_num * 4
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val = struct.unpack('<L', data[pos:pos + 4])[0]
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self.base = (val & 0xfff) << 12
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self.limit = ((val & 0x0fff0000) >> 4) | 0xfff
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self.size = self.limit - self.base + 1
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class Entry_intel_descriptor(Entry_blob):
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"""Intel flash descriptor block (4KB)
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This is placed at the start of flash and provides information about
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the SPI flash regions. In particular it provides the base address and
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size of the ME region, allowing us to place the ME binary in the right
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place.
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"""
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def __init__(self, image, etype, node):
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Entry_blob.__init__(self, image, etype, node)
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self._regions = []
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def GetPositions(self):
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pos = self.data.find(FD_SIGNATURE)
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if pos == -1:
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self.Raise('Cannot find FD signature')
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flvalsig, flmap0, flmap1, flmap2 = struct.unpack('<LLLL',
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self.data[pos:pos + 16])
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frba = ((flmap0 >> 16) & 0xff) << 4
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for i in range(MAX_REGIONS):
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self._regions.append(Region(self.data, frba, i))
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# Set the offset for ME only, for now, since the others are not used
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return {'intel-me': [self._regions[REGION_ME].base,
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self._regions[REGION_ME].size]}
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