// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Board setup routines for the Emerson/Artesyn MVME7100
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*
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* Copyright 2016 Elettra-Sincrotrone Trieste S.C.p.A.
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*
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* Author: Alessio Igor Bogani <alessio.bogani@elettra.eu>
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*
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* Based on earlier code by:
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*
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* Ajit Prem <ajit.prem@emerson.com>
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* Copyright 2008 Emerson
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*
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* USB host fixup is borrowed by:
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*
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* Martyn Welch <martyn.welch@ge.com>
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* Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
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*/
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#include <linux/pci.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/of_address.h>
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#include <asm/udbg.h>
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#include <asm/mpic.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#include "mpc86xx.h"
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#define MVME7100_INTERRUPT_REG_2_OFFSET 0x05
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#define MVME7100_DS1375_MASK 0x40
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#define MVME7100_MAX6649_MASK 0x20
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#define MVME7100_ABORT_MASK 0x10
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/*
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* Setup the architecture
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*/
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static void __init mvme7100_setup_arch(void)
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{
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struct device_node *bcsr_node;
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void __iomem *mvme7100_regs = NULL;
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u8 reg;
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if (ppc_md.progress)
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ppc_md.progress("mvme7100_setup_arch()", 0);
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#ifdef CONFIG_SMP
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mpc86xx_smp_init();
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#endif
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fsl_pci_assign_primary();
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/* Remap BCSR registers */
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bcsr_node = of_find_compatible_node(NULL, NULL,
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"artesyn,mvme7100-bcsr");
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if (bcsr_node) {
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mvme7100_regs = of_iomap(bcsr_node, 0);
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of_node_put(bcsr_node);
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}
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if (mvme7100_regs) {
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/* Disable ds1375, max6649, and abort interrupts */
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reg = readb(mvme7100_regs + MVME7100_INTERRUPT_REG_2_OFFSET);
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reg |= MVME7100_DS1375_MASK | MVME7100_MAX6649_MASK
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| MVME7100_ABORT_MASK;
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writeb(reg, mvme7100_regs + MVME7100_INTERRUPT_REG_2_OFFSET);
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} else
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pr_warn("Unable to map board registers\n");
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pr_info("MVME7100 board from Artesyn\n");
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}
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/*
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* Called very early, device-tree isn't unflattened
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*/
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static int __init mvme7100_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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return of_flat_dt_is_compatible(root, "artesyn,MVME7100");
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}
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static void mvme7100_usb_host_fixup(struct pci_dev *pdev)
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{
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unsigned int val;
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if (!machine_is(mvme7100))
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return;
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/* Ensure only ports 1 & 2 are enabled */
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pci_read_config_dword(pdev, 0xe0, &val);
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pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x2);
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/* System clock is 48-MHz Oscillator and EHCI Enabled. */
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pci_write_config_dword(pdev, 0xe4, 1 << 5);
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
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mvme7100_usb_host_fixup);
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machine_arch_initcall(mvme7100, mpc86xx_common_publish_devices);
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define_machine(mvme7100) {
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.name = "MVME7100",
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.probe = mvme7100_probe,
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.setup_arch = mvme7100_setup_arch,
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.init_IRQ = mpc86xx_init_irq,
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.get_irq = mpic_get_irq,
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.time_init = mpc86xx_time_init,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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#ifdef CONFIG_PCI
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.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
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#endif
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};
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