/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch>
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*/
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#ifndef _ASM_NIOS2_REGISTERS_H
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#define _ASM_NIOS2_REGISTERS_H
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#ifndef __ASSEMBLY__
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#include <asm/cpuinfo.h>
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#endif
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/* control register numbers */
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#define CTL_FSTATUS 0
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#define CTL_ESTATUS 1
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#define CTL_BSTATUS 2
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#define CTL_IENABLE 3
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#define CTL_IPENDING 4
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#define CTL_CPUID 5
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#define CTL_RSV1 6
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#define CTL_EXCEPTION 7
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#define CTL_PTEADDR 8
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#define CTL_TLBACC 9
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#define CTL_TLBMISC 10
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#define CTL_RSV2 11
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#define CTL_BADADDR 12
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#define CTL_CONFIG 13
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#define CTL_MPUBASE 14
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#define CTL_MPUACC 15
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/* access control registers using GCC builtins */
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#define RDCTL(r) __builtin_rdctl(r)
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#define WRCTL(r, v) __builtin_wrctl(r, v)
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/* status register bits */
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#define STATUS_PIE (1 << 0) /* processor interrupt enable */
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#define STATUS_U (1 << 1) /* user mode */
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#define STATUS_EH (1 << 2) /* Exception mode */
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/* estatus register bits */
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#define ESTATUS_EPIE (1 << 0) /* processor interrupt enable */
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#define ESTATUS_EU (1 << 1) /* user mode */
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#define ESTATUS_EH (1 << 2) /* Exception mode */
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/* tlbmisc register bits */
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#define TLBMISC_PID_SHIFT 4
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#ifndef __ASSEMBLY__
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#define TLBMISC_PID_MASK ((1UL << cpuinfo.tlb_pid_num_bits) - 1)
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#endif
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#define TLBMISC_WAY_MASK 0xf
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#define TLBMISC_WAY_SHIFT 20
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#define TLBMISC_PID (TLBMISC_PID_MASK << TLBMISC_PID_SHIFT) /* TLB PID */
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#define TLBMISC_WE (1 << 18) /* TLB write enable */
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#define TLBMISC_RD (1 << 19) /* TLB read */
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#define TLBMISC_WAY (TLBMISC_WAY_MASK << TLBMISC_WAY_SHIFT) /* TLB way */
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#endif /* _ASM_NIOS2_REGISTERS_H */
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