// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
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*/
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#include <dt-bindings/display/media-bus-format.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include "rk3568-evb1-ddr4-v10.dtsi"
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#include "rk3568-android.dtsi"
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/ {
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model = "Rockchip RK3568 EVB1 V10 Board with single channel lvds";
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compatible = "rockchip,rk3568-evb1-ddr4-v10-single-channel-lvds", "rockchip,rk3568";
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/* panel: claa070wp03xg */
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panel-lvds0 {
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compatible = "simple-panel";
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backlight = <&backlight>;
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power-supply = <&vcc3v3_lcd0_n>;
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enable-delay-ms = <20>;
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prepare-delay-ms = <20>;
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unprepare-delay-ms = <20>;
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disable-delay-ms = <20>;
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bus-format = <MEDIA_BUS_FMT_RGB666_1X7X3_SPWG>;
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width-mm = <217>;
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height-mm = <136>;
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display-timings {
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native-mode = <&timing0>;
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timing0: timing0 {
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clock-frequency = <67000000>;
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hactive = <800>;
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vactive = <1280>;
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hback-porch = <60>;
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hfront-porch = <60>;
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vback-porch = <4>;
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vfront-porch = <2>;
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hsync-len = <8>;
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vsync-len = <8>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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panel_in_lvds0: endpoint {
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remote-endpoint = <&lvds0_out_panel>;
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};
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};
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};
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};
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};
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&backlight {
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status = "okay";
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};
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&backlight1 {
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status = "okay";
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};
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&dsi0 {
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status = "disabled";
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};
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&dsi0_in_vp0 {
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status = "disabled";
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};
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&dsi0_in_vp1 {
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status = "disabled";
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};
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&dsi1_in_vp1 {
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status = "disabled";
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};
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&edp_in_vp1 {
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status = "disabled";
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};
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&hdmi_in_vp1 {
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status = "okay";
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};
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&lvds0 {
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status = "okay";
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ports {
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port@1 {
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reg = <1>;
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lvds0_out_panel: endpoint {
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remote-endpoint = <&panel_in_lvds0>;
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};
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};
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};
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};
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&lvds0_in_vp1 {
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status = "okay";
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};
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&lvds1 {
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status = "disabled";
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};
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&rgb_in_vp2 {
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status = "disabled";
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};
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&vcc3v3_lcd0_n {
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gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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&vcc3v3_lcd1_n {
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gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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&video_phy0 {
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status = "okay";
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};
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&video_phy1 {
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status = "okay";
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};
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