// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2015 Jablotron s.r.o. -- https://www.jablotron.com/
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* Author: Rostislav Lisovy <lisovy@jablotron.cz>
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*/
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#include "am33xx.dtsi"
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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model = "Grinn AM335x ChiliSOM";
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compatible = "grinn,am335x-chilisom", "ti,am33xx";
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cpus {
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cpu@0 {
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cpu0-supply = <&dcdc2_reg>;
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};
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x20000000>; /* 512 MB */
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};
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};
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&am33xx_pinmux {
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pinctrl-names = "default";
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i2c0_pins: pinmux_i2c0_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
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>;
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};
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nandflash_pins: nandflash_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT_PULLUP, MUX_MODE0)
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>;
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};
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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status = "okay";
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clock-frequency = <400000>;
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tps: tps@24 {
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reg = <0x24>;
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};
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};
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/include/ "tps65217.dtsi"
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&tps {
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regulators {
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dcdc1_reg: regulator@0 {
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regulator-name = "vdds_dpr";
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regulator-always-on;
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};
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dcdc2_reg: regulator@1 {
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/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
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regulator-name = "vdd_mpu";
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regulator-min-microvolt = <925000>;
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regulator-max-microvolt = <1325000>;
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regulator-boot-on;
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regulator-always-on;
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};
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dcdc3_reg: regulator@2 {
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/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
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regulator-name = "vdd_core";
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regulator-min-microvolt = <925000>;
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regulator-max-microvolt = <1150000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo1_reg: regulator@3 {
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regulator-name = "vio,vrtc,vdds";
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regulator-boot-on;
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regulator-always-on;
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};
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ldo2_reg: regulator@4 {
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regulator-name = "vdd_3v3aux";
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regulator-boot-on;
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regulator-always-on;
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};
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ldo3_reg: regulator@5 {
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regulator-name = "vdd_1v8";
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regulator-boot-on;
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regulator-always-on;
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};
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ldo4_reg: regulator@6 {
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regulator-name = "vdd_3v3d";
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regulator-boot-on;
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regulator-always-on;
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};
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};
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};
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&rtc {
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system-power-controller;
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pinctrl-0 = <&ext_wakeup>;
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pinctrl-names = "default";
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ext_wakeup: ext-wakeup {
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pins = "ext_wakeup0";
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input-enable;
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};
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};
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/* NAND Flash */
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&elm {
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status = "okay";
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};
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&gpmc {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&nandflash_pins>;
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ranges = <0 0 0x08000000 0x01000000>; /* CS0 0 @addr 0x08000000, size 0x01000000 */
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nand@0,0 {
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compatible = "ti,omap2-nand";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
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ti,nand-ecc-opt = "bch8";
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ti,elm-id = <&elm>;
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nand-bus-width = <8>;
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gpmc,device-width = <1>;
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gpmc,sync-clk-ps = <0>;
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gpmc,cs-on-ns = <0>;
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gpmc,cs-rd-off-ns = <44>;
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gpmc,cs-wr-off-ns = <44>;
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gpmc,adv-on-ns = <6>;
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gpmc,adv-rd-off-ns = <34>;
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gpmc,adv-wr-off-ns = <44>;
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gpmc,we-on-ns = <0>;
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gpmc,we-off-ns = <40>;
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gpmc,oe-on-ns = <0>;
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gpmc,oe-off-ns = <54>;
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gpmc,access-ns = <64>;
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gpmc,rd-cycle-ns = <82>;
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gpmc,wr-cycle-ns = <82>;
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gpmc,bus-turnaround-ns = <0>;
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gpmc,cycle2cycle-delay-ns = <0>;
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gpmc,clk-activation-ns = <0>;
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gpmc,wr-access-ns = <40>;
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gpmc,wr-data-mux-bus-ns = <0>;
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};
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};
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