/*
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* Copyright 2014 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/ {
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soc {
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prcmu@80157000 {
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ab8505 {
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ab8505-gpio {
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/* Hog a few default settings */
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pinctrl-names = "default";
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pinctrl-0 = <&gpio2_default_mode>,
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<&gpio10_default_mode>,
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<&gpio11_default_mode>,
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<&gpio13_default_mode>,
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<&gpio34_default_mode>,
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<&gpio50_default_mode>,
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<&pwm_default_mode>,
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<&adi2_default_mode>,
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<&modsclsda_default_mode>,
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<&resethw_default_mode>,
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<&service_default_mode>;
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/*
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* Pins 2, 10, 11, 13, 34 and 50
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* are muxed in as GPIO, and configured as INPUT PULL DOWN
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*/
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gpio2 {
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gpio2_default_mode: gpio2_default {
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default_mux {
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function = "gpio";
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groups = "gpio2_a_1";
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};
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default_cfg {
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pins = "GPIO2_R5";
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input-enable;
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bias-pull-down;
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};
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};
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};
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gpio10 {
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gpio10_default_mode: gpio10_default {
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default_mux {
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function = "gpio";
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groups = "gpio10_d_1";
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};
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default_cfg {
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pins = "GPIO10_B16";
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input-enable;
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bias-pull-down;
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};
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};
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};
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gpio11 {
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gpio11_default_mode: gpio11_default {
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default_mux {
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function = "gpio";
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groups = "gpio11_d_1";
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};
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default_cfg {
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pins = "GPIO11_B17";
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input-enable;
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bias-pull-down;
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};
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};
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};
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gpio13 {
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gpio13_default_mode: gpio13_default {
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default_mux {
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function = "gpio";
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groups = "gpio13_d_1";
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};
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default_cfg {
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pins = "GPIO13_D17";
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input-enable;
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bias-disable;
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};
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};
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};
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gpio34 {
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gpio34_default_mode: gpio34_default {
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default_mux {
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function = "gpio";
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groups = "gpio34_a_1";
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};
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default_cfg {
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pins = "GPIO34_H14";
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input-enable;
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bias-pull-down;
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};
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};
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};
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gpio50 {
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gpio50_default_mode: gpio50_default {
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default_mux {
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function = "gpio";
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groups = "gpio50_d_1";
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};
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default_cfg {
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pins = "GPIO50_L4";
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input-enable;
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bias-disable;
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};
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};
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};
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/* This sets up the PWM pin 14 */
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pwm {
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pwm_default_mode: pwm_default {
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default_mux {
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function = "pwmout";
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groups = "pwmout1_d_1";
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};
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default_cfg {
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pins = "GPIO14_C16";
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input-enable;
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bias-pull-down;
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};
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};
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};
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/* This sets up audio interface 2 */
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adi2 {
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adi2_default_mode: adi2_default {
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default_mux {
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function = "adi2";
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groups = "adi2_d_1";
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};
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default_cfg {
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pins = "GPIO17_P2",
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"GPIO18_N3",
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"GPIO19_T1",
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"GPIO20_P3";
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input-enable;
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bias-pull-down;
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};
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};
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};
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/* Modem I2C setup (SCL and SDA pins) */
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modsclsda {
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modsclsda_default_mode: modsclsda_default {
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default_mux {
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function = "modsclsda";
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groups = "modsclsda_d_1";
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};
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default_cfg {
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pins = "GPIO40_J15",
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"GPIO41_J14";
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input-enable;
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bias-pull-down;
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};
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};
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};
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resethw {
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resethw_default_mode: resethw_default {
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default_mux {
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function = "resethw";
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groups = "resethw_d_1";
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};
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default_cfg {
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pins = "GPIO52_D16";
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input-enable;
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bias-pull-down;
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};
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};
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};
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service {
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service_default_mode: service_default {
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default_mux {
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function = "service";
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groups = "service_d_1";
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};
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default_cfg {
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pins = "GPIO53_D15";
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input-enable;
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bias-pull-down;
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};
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};
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};
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/*
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* Clock output pins associated with regulators.
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*/
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sysclkreq2 {
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sysclkreq2_default_mode: sysclkreq2_default {
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default_mux {
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function = "sysclkreq";
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groups = "sysclkreq2_d_1";
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};
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default_cfg {
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pins = "GPIO1_N4";
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input-enable;
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bias-disable;
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};
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};
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sysclkreq2_sleep_mode: sysclkreq2_sleep {
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default_mux {
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function = "gpio";
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groups = "gpio1_a_1";
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};
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default_cfg {
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pins = "GPIO1_N4";
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input-enable;
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bias-pull-down;
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};
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};
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};
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sysclkreq4 {
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sysclkreq4_default_mode: sysclkreq4_default {
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default_mux {
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function = "sysclkreq";
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groups = "sysclkreq4_d_1";
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};
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default_cfg {
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pins = "GPIO3_P5";
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input-enable;
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bias-disable;
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};
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};
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sysclkreq4_sleep_mode: sysclkreq4_sleep {
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default_mux {
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function = "gpio";
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groups = "gpio3_a_1";
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};
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default_cfg {
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pins = "GPIO3_P5";
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input-enable;
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bias-pull-down;
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};
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};
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};
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};
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};
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};
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};
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};
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