// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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*/
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/dts-v1/;
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#include "rv1126.dtsi"
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#include "rv1126-ipc.dtsi"
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/ {
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model = "Rockchip RV1109 38 RK630 Board";
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compatible = "rockchip,rv1109-38-rk630", "rockchip,rv1109";
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chosen {
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bootargs = "earlycon=uart8250,mmio32,0xff570000 console=ttyFIQ0 ubi.mtd=3 ubi.block=0,rootfs root=/dev/ubiblock0_0 rootfstype=squashfs snd_aloop.index=7";
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};
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/delete-node/ vdd-npu;
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/delete-node/ vdd-vepu;
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cam_ircut0: cam_ircut {
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compatible = "rockchip,ircut";
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status = "okay";
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ircut-open-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>;
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ircut-close-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&ircut_pins>;
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rockchip,camera-module-index = <1>;
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rockchip,camera-module-facing = "front";
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};
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rk630_sound: rk630-sound {
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status = "okay";
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,name = "rockchip,rk630-codec";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,cpu {
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sound-dai = <&i2s0_8ch>;
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};
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simple-audio-card,codec {
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sound-dai = <&rk630_codec>;
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};
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};
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vcc_1v8: vcc-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_1v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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vcc_dvdd: vcc-dvdd {
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compatible = "regulator-fixed";
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regulator-name = "vcc_dvdd";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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};
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vcc3v3_sys: vcc33sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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vcc_sd: vcc-sd {
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compatible = "regulator-fixed";
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gpio = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
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pinctrl-0 = <&sdmmc_pwr>;
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pinctrl-names = "default";
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regulator-name = "vcc_sd";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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startup-delay-us = <100000>;
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vin-supply = <&vcc3v3_sys>;
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enable-active-high;
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};
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vdd_arm: vdd-arm {
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compatible = "pwm-regulator";
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pwms = <&pwm0 0 5000 1>;
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regulator-name = "vdd_arm";
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regulator-min-microvolt = <720000>;
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regulator-max-microvolt = <1000000>;
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regulator-init-microvolt = <825000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-settling-time-up-us = <250>;
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pwm-supply = <&vcc3v3_sys>;
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status = "okay";
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};
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/*
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* pwm1 is reserved as voltage adjustment in hardware
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* use fixed regulator to avoid voltage adjustment by software
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*/
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vdd_logic_npu_vepu: vdd-logic-npu-vepu {
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compatible = "pwm-regulator";
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pwms = <&pwm1 0 5000 1>;
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regulator-name = "vdd_logic_npu_vepu";
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regulator-min-microvolt = <720000>;
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regulator-max-microvolt = <880000>;
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regulator-init-microvolt = <825000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-settling-time-up-us = <250>;
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pwm-supply = <&vcc3v3_sys>;
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status = "okay";
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};
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vdd_logic_npu_vepu_fixed: vdd-logic-npu-vepu-fixed {
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compatible = "regulator-fixed";
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regulator-name = "vdd_logic_npu_vepu-fixed";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <825000>;
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regulator-max-microvolt = <825000>;
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};
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wireless_wlan: wireless-wlan {
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compatible = "wlan-platdata";
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rockchip,grf = <&grf>;
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wifi_chip_type = "rtl8188fu";
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WIFI,poweren_gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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};
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&csi_dphy0 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_in_ucam0: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&ucam_out0>;
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data-lanes = <1 2 3 4>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csidphy0_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&isp_in>;
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};
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};
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};
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};
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&gmac {
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phy-mode = "rmii";
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clock_in_out = "output";
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assigned-clocks = <&cru CLK_GMAC_SRC>, <&cru CLK_GMAC_TX_RX>;
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assigned-clock-parents = <&cru CLK_GMAC_SRC_M0>, <&cru RMII_MODE_CLK>;
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assigned-clock-rates = <50000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&rmiim0_miim &rgmiim0_rxer &rmiim0_bus2 &rgmiim0_mclkinout_level0>;
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phy-handle = <&phy>;
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status = "okay";
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};
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&i2c1 {
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status = "okay";
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clock-frequency = <400000>;
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os04a10: os04a10@36 {
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compatible = "ovti,os04a10";
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reg = <0x36>;
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clocks = <&cru CLK_MIPICSI_OUT>;
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clock-names = "xvclk";
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power-domains = <&power RV1126_PD_VI>;
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pinctrl-names = "rockchip,camera_default";
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pinctrl-0 = <&mipicsi_clk0>;
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avdd-supply = <&vcc3v3_sys>;
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dovdd-supply = <&vcc_1v8>;
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dvdd-supply = <&vcc_dvdd>;
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pwdn-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
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rockchip,camera-module-index = <1>;
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rockchip,camera-module-facing = "front";
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rockchip,camera-module-name = "CMK-OT1607-FV1";
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rockchip,camera-module-lens-name = "M12-40IRC-4MP-F16";
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ir-cut = <&cam_ircut0>;
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port {
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ucam_out0: endpoint {
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remote-endpoint = <&mipi_in_ucam0>;
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data-lanes = <1 2 3 4>;
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};
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};
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};
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};
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&i2c4 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4m1_xfer>;
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rk630: rk630@50 {
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reg = <0x50>;
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interrupt-parent = <&gpio0>;
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interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
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reset-gpios = <&gpio3 RK_PD7 GPIO_ACTIVE_LOW>;
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clocks = <&cru CLK_GMAC_ETHERNET_OUT>;
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clock-names = "ref";
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assigned-clocks = <&cru CLK_GMAC_ETHERNET_OUT>;
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assigned-clock-rates = <25000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&clkm0_out_ethernet>;
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status = "okay";
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};
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};
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#include "arm64/rockchip/rk630.dtsi"
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&i2s0_8ch {
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status = "okay";
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rockchip,clk-trcm = <1>;
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#sound-dai-cells = <0>;
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pinctrl-0 = <&i2s0m0_sclk_tx
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&i2s0m0_lrck_tx
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&i2s0m0_sdi0
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&i2s0m0_sdo0>;
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};
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&mdio {
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phy: phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x0>;
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};
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};
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&nandc {
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status = "okay";
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};
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&npu {
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npu-supply = <&vdd_logic_npu_vepu_fixed>;
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};
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&pinctrl {
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ircut {
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/omit-if-no-ref/
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ircut_pins: ircut-pins {
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rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>,
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<3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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sdmmc-pwr {
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/omit-if-no-ref/
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sdmmc_pwr: sdmmc-pwr {
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rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&pmu_io_domains {
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status = "okay";
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pmuio0-supply = <&vcc3v3_sys>;
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pmuio1-supply = <&vcc3v3_sys>;
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vccio2-supply = <&vcc3v3_sys>;
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vccio4-supply = <&vcc_1v8>;
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vccio5-supply = <&vcc3v3_sys>;
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vccio6-supply = <&vcc3v3_sys>;
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vccio7-supply = <&vcc3v3_sys>;
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};
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&rk630_codec {
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status = "okay";
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#sound-dai-cells = <0>;
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compatible = "rockchip,rk630-codec";
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clocks = <&cru MCLK_I2S0_TX_OUT2IO>;
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clock-names = "mclk";
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pinctrl-names = "default";
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pinctrl-0 = <&i2s0m0_mclk>;
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assigned-clocks = <&cru MCLK_I2S0_TX_OUT2IO>;
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assigned-clock-parents = <&cru MCLK_I2S0_TX>;
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capture_volume = <12>;
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hp_volume = <26>;
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spk_volume = <26>;
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gpio_debug;
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};
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&rk630_macphy {
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status = "okay";
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};
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&rkisp_vir0 {
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status = "okay";
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ports {
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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isp_in: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&csidphy0_out>;
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};
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};
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};
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};
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&rkvenc {
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venc-supply = <&vdd_logic_npu_vepu_fixed>;
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};
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&rockchip_suspend {
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status = "okay";
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rockchip,sleep-debug-en = <1>;
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rockchip,sleep-mode-config = <
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(0
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| RKPM_SLP_ARMOFF
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| RKPM_SLP_PMU_PMUALIVE_32K
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| RKPM_SLP_PMU_DIS_OSC
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)
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>;
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};
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&sdmmc0_bus4 {
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rockchip,pins =
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/* sdmmc0_d0 */
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<1 RK_PA4 1 &pcfg_pull_up_drv_level_0>,
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/* sdmmc0_d1 */
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<1 RK_PA5 1 &pcfg_pull_up_drv_level_0>,
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/* sdmmc0_d2 */
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<1 RK_PA6 1 &pcfg_pull_up_drv_level_0>,
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/* sdmmc0_d3 */
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<1 RK_PA7 1 &pcfg_pull_up_drv_level_0>;
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};
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&sdmmc0_clk {
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rockchip,pins =
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/* sdmmc0_clk */
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<1 RK_PB0 1 &pcfg_pull_up_drv_level_3>;
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};
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&sdmmc0_cmd {
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rockchip,pins =
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/* sdmmc0_cmd */
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<1 RK_PB1 1 &pcfg_pull_up_drv_level_0>;
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};
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&sdmmc {
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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card-detect-delay = <200>;
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rockchip,default-sample-phase = <90>;
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supports-sd;
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status = "okay";
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vmmc-supply = <&vcc_sd>;
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};
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&sfc {
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status = "okay";
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};
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&u2phy_host {
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status = "okay";
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};
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&u2phy1 {
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status = "okay";
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};
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&usb_host0_ehci {
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status = "okay";
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};
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&usb_host0_ohci {
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status = "okay";
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};
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