* Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
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Required properties:
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- compatible :
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- "fsl,imx1-i2c" for I2C compatible with the one integrated on i.MX1 SoC
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- "fsl,imx21-i2c" for I2C compatible with the one integrated on i.MX21 SoC
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- "fsl,vf610-i2c" for I2C compatible with the one integrated on Vybrid vf610 SoC
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- reg : Should contain I2C/HS-I2C registers location and length
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- interrupts : Should contain I2C/HS-I2C interrupt
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- clocks : Should contain the I2C/HS-I2C clock specifier
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Optional properties:
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- clock-frequency : Constains desired I2C/HS-I2C bus clock frequency in Hz.
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The absence of the property indicates the default frequency 100 kHz.
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- dmas: A list of two dma specifiers, one for each entry in dma-names.
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- dma-names: should contain "tx" and "rx".
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- scl-gpios: specify the gpio related to SCL pin
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- sda-gpios: specify the gpio related to SDA pin
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- pinctrl: add extra pinctrl to configure i2c pins to gpio function for i2c
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bus recovery, call it "gpio" state
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Examples:
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i2c@83fc4000 { /* I2C2 on i.MX51 */
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compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
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reg = <0x83fc4000 0x4000>;
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interrupts = <63>;
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};
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i2c@70038000 { /* HS-I2C on i.MX51 */
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compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
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reg = <0x70038000 0x4000>;
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interrupts = <64>;
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clock-frequency = <400000>;
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};
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i2c0: i2c@40066000 { /* i2c0 on vf610 */
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compatible = "fsl,vf610-i2c";
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reg = <0x40066000 0x1000>;
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interrupts =<0 71 0x04>;
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dmas = <&edma0 0 50>,
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<&edma0 0 51>;
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dma-names = "rx","tx";
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c1>;
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pinctrl-1 = <&pinctrl_i2c1_gpio>;
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scl-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>;
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sda-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;
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};
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