/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* drivers/usb/host/xhci-rcar.h
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*
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* Copyright (C) 2014 Renesas Electronics Corporation
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*/
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#ifndef _XHCI_RCAR_H
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#define _XHCI_RCAR_H
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#define XHCI_RCAR_FIRMWARE_NAME_V1 "r8a779x_usb3_v1.dlmem"
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#define XHCI_RCAR_FIRMWARE_NAME_V2 "r8a779x_usb3_v2.dlmem"
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#define XHCI_RCAR_FIRMWARE_NAME_V3 "r8a779x_usb3_v3.dlmem"
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#if IS_ENABLED(CONFIG_USB_XHCI_RCAR)
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void xhci_rcar_start(struct usb_hcd *hcd);
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int xhci_rcar_init_quirk(struct usb_hcd *hcd);
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int xhci_rcar_resume_quirk(struct usb_hcd *hcd);
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#else
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static inline void xhci_rcar_start(struct usb_hcd *hcd)
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{
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}
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static inline int xhci_rcar_init_quirk(struct usb_hcd *hcd)
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{
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return 0;
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}
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static inline int xhci_rcar_resume_quirk(struct usb_hcd *hcd)
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{
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return 0;
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}
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#endif
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/*
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* On R-Car Gen2 and Gen3, the AC64 bit (bit 0) of HCCPARAMS1 is set
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* to 1. However, these SoCs don't support 64-bit address memory
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* pointers. So, this driver clears the AC64 bit of xhci->hcc_params
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* to call dma_set_coherent_mask(dev, DMA_BIT_MASK(32)) in
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* xhci_gen_setup() by using the XHCI_NO_64BIT_SUPPORT quirk.
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*
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* And, since the firmware/internal CPU control the USBSTS.STS_HALT
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* and the process speed is down when the roothub port enters U3,
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* long delay for the handshake of STS_HALT is neeed in xhci_suspend()
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* by using the XHCI_SLOW_SUSPEND quirk.
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*/
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#define SET_XHCI_PLAT_PRIV_FOR_RCAR(firmware) \
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.firmware_name = firmware, \
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.quirks = XHCI_NO_64BIT_SUPPORT | XHCI_TRUST_TX_LENGTH | \
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XHCI_SLOW_SUSPEND, \
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.init_quirk = xhci_rcar_init_quirk, \
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.plat_start = xhci_rcar_start, \
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.resume_quirk = xhci_rcar_resume_quirk,
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#endif /* _XHCI_RCAR_H */
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