// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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/* Copyright (C) 2015-2018 Netronome Systems, Inc. */
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/*
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* nfp_target.c
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* CPP Access Width Decoder
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* Authors: Jakub Kicinski <jakub.kicinski@netronome.com>
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* Jason McMullan <jason.mcmullan@netronome.com>
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* Francois H. Theron <francois.theron@netronome.com>
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*/
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#define pr_fmt(fmt) "NFP target: " fmt
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#include <linux/bitops.h>
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#include <linux/kernel.h>
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#include <linux/printk.h>
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#include "nfp_cpp.h"
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#include "nfp6000/nfp6000.h"
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#define P32 1
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#define P64 2
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/* This structure ONLY includes items that can be done with a read or write of
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* 32-bit or 64-bit words. All others are not listed.
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*/
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#define AT(_action, _token, _pull, _push) \
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case NFP_CPP_ID(0, (_action), (_token)): \
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return PUSHPULL((_pull), (_push))
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static int target_rw(u32 cpp_id, int pp, int start, int len)
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{
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switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
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AT(0, 0, 0, pp);
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AT(1, 0, pp, 0);
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AT(NFP_CPP_ACTION_RW, 0, pp, pp);
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default:
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return -EINVAL;
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}
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}
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static int nfp6000_nbi_dma(u32 cpp_id)
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{
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switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
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AT(0, 0, 0, P64); /* ReadNbiDma */
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AT(1, 0, P64, 0); /* WriteNbiDma */
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AT(NFP_CPP_ACTION_RW, 0, P64, P64);
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default:
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return -EINVAL;
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}
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}
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static int nfp6000_nbi_stats(u32 cpp_id)
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{
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switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
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AT(0, 0, 0, P32); /* ReadNbiStats */
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AT(1, 0, P32, 0); /* WriteNbiStats */
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AT(NFP_CPP_ACTION_RW, 0, P32, P32);
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default:
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return -EINVAL;
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}
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}
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static int nfp6000_nbi_tm(u32 cpp_id)
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{
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switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
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AT(0, 0, 0, P64); /* ReadNbiTM */
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AT(1, 0, P64, 0); /* WriteNbiTM */
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AT(NFP_CPP_ACTION_RW, 0, P64, P64);
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default:
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return -EINVAL;
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}
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}
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static int nfp6000_nbi_ppc(u32 cpp_id)
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{
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switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
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AT(0, 0, 0, P64); /* ReadNbiPreclassifier */
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AT(1, 0, P64, 0); /* WriteNbiPreclassifier */
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AT(NFP_CPP_ACTION_RW, 0, P64, P64);
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default:
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return -EINVAL;
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}
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}
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static int nfp6000_nbi(u32 cpp_id, u64 address)
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{
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u64 rel_addr = address & 0x3fFFFF;
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if (rel_addr < (1 << 20))
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return nfp6000_nbi_dma(cpp_id);
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if (rel_addr < (2 << 20))
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return nfp6000_nbi_stats(cpp_id);
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if (rel_addr < (3 << 20))
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return nfp6000_nbi_tm(cpp_id);
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return nfp6000_nbi_ppc(cpp_id);
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}
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/* This structure ONLY includes items that can be done with a read or write of
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* 32-bit or 64-bit words. All others are not listed.
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*/
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static int nfp6000_mu_common(u32 cpp_id)
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{
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switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
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AT(NFP_CPP_ACTION_RW, 0, P64, P64); /* read_be/write_be */
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AT(NFP_CPP_ACTION_RW, 1, P64, P64); /* read_le/write_le */
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AT(NFP_CPP_ACTION_RW, 2, P64, P64); /* read_swap_be/write_swap_be */
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AT(NFP_CPP_ACTION_RW, 3, P64, P64); /* read_swap_le/write_swap_le */
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AT(0, 0, 0, P64); /* read_be */
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AT(0, 1, 0, P64); /* read_le */
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AT(0, 2, 0, P64); /* read_swap_be */
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AT(0, 3, 0, P64); /* read_swap_le */
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AT(1, 0, P64, 0); /* write_be */
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AT(1, 1, P64, 0); /* write_le */
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AT(1, 2, P64, 0); /* write_swap_be */
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AT(1, 3, P64, 0); /* write_swap_le */
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AT(3, 0, 0, P32); /* atomic_read */
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AT(3, 2, P32, 0); /* mask_compare_write */
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AT(4, 0, P32, 0); /* atomic_write */
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AT(4, 2, 0, 0); /* atomic_write_imm */
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AT(4, 3, 0, P32); /* swap_imm */
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AT(5, 0, P32, 0); /* set */
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AT(5, 3, 0, P32); /* test_set_imm */
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AT(6, 0, P32, 0); /* clr */
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AT(6, 3, 0, P32); /* test_clr_imm */
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AT(7, 0, P32, 0); /* add */
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AT(7, 3, 0, P32); /* test_add_imm */
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AT(8, 0, P32, 0); /* addsat */
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AT(8, 3, 0, P32); /* test_subsat_imm */
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AT(9, 0, P32, 0); /* sub */
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AT(9, 3, 0, P32); /* test_sub_imm */
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AT(10, 0, P32, 0); /* subsat */
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AT(10, 3, 0, P32); /* test_subsat_imm */
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AT(13, 0, 0, P32); /* microq128_get */
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AT(13, 1, 0, P32); /* microq128_pop */
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AT(13, 2, P32, 0); /* microq128_put */
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AT(15, 0, P32, 0); /* xor */
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AT(15, 3, 0, P32); /* test_xor_imm */
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AT(28, 0, 0, P32); /* read32_be */
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AT(28, 1, 0, P32); /* read32_le */
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AT(28, 2, 0, P32); /* read32_swap_be */
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AT(28, 3, 0, P32); /* read32_swap_le */
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AT(31, 0, P32, 0); /* write32_be */
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AT(31, 1, P32, 0); /* write32_le */
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AT(31, 2, P32, 0); /* write32_swap_be */
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AT(31, 3, P32, 0); /* write32_swap_le */
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default:
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return -EINVAL;
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}
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}
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static int nfp6000_mu_ctm(u32 cpp_id)
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{
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switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
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AT(16, 1, 0, P32); /* packet_read_packet_status */
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AT(17, 1, 0, P32); /* packet_credit_get */
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AT(17, 3, 0, P64); /* packet_add_thread */
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AT(18, 2, 0, P64); /* packet_free_and_return_pointer */
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AT(18, 3, 0, P64); /* packet_return_pointer */
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AT(21, 0, 0, P64); /* pe_dma_to_memory_indirect */
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AT(21, 1, 0, P64); /* pe_dma_to_memory_indirect_swap */
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AT(21, 2, 0, P64); /* pe_dma_to_memory_indirect_free */
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AT(21, 3, 0, P64); /* pe_dma_to_memory_indirect_free_swap */
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default:
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return nfp6000_mu_common(cpp_id);
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}
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}
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static int nfp6000_mu_emu(u32 cpp_id)
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{
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switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
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AT(18, 0, 0, P32); /* read_queue */
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AT(18, 1, 0, P32); /* read_queue_ring */
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AT(18, 2, P32, 0); /* write_queue */
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AT(18, 3, P32, 0); /* write_queue_ring */
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AT(20, 2, P32, 0); /* journal */
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AT(21, 0, 0, P32); /* get */
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AT(21, 1, 0, P32); /* get_eop */
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AT(21, 2, 0, P32); /* get_freely */
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AT(22, 0, 0, P32); /* pop */
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AT(22, 1, 0, P32); /* pop_eop */
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AT(22, 2, 0, P32); /* pop_freely */
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default:
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return nfp6000_mu_common(cpp_id);
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}
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}
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static int nfp6000_mu_imu(u32 cpp_id)
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{
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return nfp6000_mu_common(cpp_id);
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}
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static int nfp6000_mu(u32 cpp_id, u64 address)
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{
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int pp;
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if (address < 0x2000000000ULL)
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pp = nfp6000_mu_ctm(cpp_id);
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else if (address < 0x8000000000ULL)
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pp = nfp6000_mu_emu(cpp_id);
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else if (address < 0x9800000000ULL)
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pp = nfp6000_mu_ctm(cpp_id);
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else if (address < 0x9C00000000ULL)
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pp = nfp6000_mu_emu(cpp_id);
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else if (address < 0xA000000000ULL)
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pp = nfp6000_mu_imu(cpp_id);
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else
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pp = nfp6000_mu_ctm(cpp_id);
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return pp;
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}
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static int nfp6000_ila(u32 cpp_id)
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{
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switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
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AT(0, 1, 0, P32); /* read_check_error */
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AT(2, 0, 0, P32); /* read_int */
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AT(3, 0, P32, 0); /* write_int */
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default:
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return target_rw(cpp_id, P32, 48, 4);
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}
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}
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static int nfp6000_pci(u32 cpp_id)
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{
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switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
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AT(2, 0, 0, P32);
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AT(3, 0, P32, 0);
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default:
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return target_rw(cpp_id, P32, 4, 4);
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}
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}
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static int nfp6000_crypto(u32 cpp_id)
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{
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switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
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AT(2, 0, P64, 0);
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default:
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return target_rw(cpp_id, P64, 12, 4);
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}
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}
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static int nfp6000_cap_xpb(u32 cpp_id)
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{
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switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
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AT(0, 1, 0, P32); /* RingGet */
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AT(0, 2, P32, 0); /* Interthread Signal */
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AT(1, 1, P32, 0); /* RingPut */
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AT(1, 2, P32, 0); /* CTNNWr */
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AT(2, 0, 0, P32); /* ReflectRd, signal none */
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AT(2, 1, 0, P32); /* ReflectRd, signal self */
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AT(2, 2, 0, P32); /* ReflectRd, signal remote */
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AT(2, 3, 0, P32); /* ReflectRd, signal both */
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AT(3, 0, P32, 0); /* ReflectWr, signal none */
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AT(3, 1, P32, 0); /* ReflectWr, signal self */
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AT(3, 2, P32, 0); /* ReflectWr, signal remote */
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AT(3, 3, P32, 0); /* ReflectWr, signal both */
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AT(NFP_CPP_ACTION_RW, 1, P32, P32);
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default:
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return target_rw(cpp_id, P32, 1, 63);
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}
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}
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static int nfp6000_cls(u32 cpp_id)
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{
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switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
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AT(0, 3, P32, 0); /* xor */
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AT(2, 0, P32, 0); /* set */
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AT(2, 1, P32, 0); /* clr */
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AT(4, 0, P32, 0); /* add */
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AT(4, 1, P32, 0); /* add64 */
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AT(6, 0, P32, 0); /* sub */
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AT(6, 1, P32, 0); /* sub64 */
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AT(6, 2, P32, 0); /* subsat */
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AT(8, 2, P32, 0); /* hash_mask */
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AT(8, 3, P32, 0); /* hash_clear */
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AT(9, 0, 0, P32); /* ring_get */
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AT(9, 1, 0, P32); /* ring_pop */
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AT(9, 2, 0, P32); /* ring_get_freely */
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AT(9, 3, 0, P32); /* ring_pop_freely */
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AT(10, 0, P32, 0); /* ring_put */
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AT(10, 2, P32, 0); /* ring_journal */
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AT(14, 0, P32, 0); /* reflect_write_sig_local */
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AT(15, 1, 0, P32); /* reflect_read_sig_local */
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AT(17, 2, P32, 0); /* statisic */
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AT(24, 0, 0, P32); /* ring_read */
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AT(24, 1, P32, 0); /* ring_write */
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AT(25, 0, 0, P32); /* ring_workq_add_thread */
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AT(25, 1, P32, 0); /* ring_workq_add_work */
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default:
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return target_rw(cpp_id, P32, 0, 64);
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}
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}
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int nfp_target_pushpull(u32 cpp_id, u64 address)
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{
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switch (NFP_CPP_ID_TARGET_of(cpp_id)) {
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case NFP_CPP_TARGET_NBI:
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return nfp6000_nbi(cpp_id, address);
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case NFP_CPP_TARGET_QDR:
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return target_rw(cpp_id, P32, 24, 4);
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case NFP_CPP_TARGET_ILA:
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return nfp6000_ila(cpp_id);
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case NFP_CPP_TARGET_MU:
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return nfp6000_mu(cpp_id, address);
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case NFP_CPP_TARGET_PCIE:
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return nfp6000_pci(cpp_id);
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case NFP_CPP_TARGET_ARM:
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if (address < 0x10000)
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return target_rw(cpp_id, P64, 1, 1);
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else
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return target_rw(cpp_id, P32, 1, 1);
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case NFP_CPP_TARGET_CRYPTO:
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return nfp6000_crypto(cpp_id);
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case NFP_CPP_TARGET_CT_XPB:
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return nfp6000_cap_xpb(cpp_id);
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case NFP_CPP_TARGET_CLS:
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return nfp6000_cls(cpp_id);
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case 0:
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return target_rw(cpp_id, P32, 4, 4);
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default:
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return -EINVAL;
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}
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}
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#undef AT
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#undef P32
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#undef P64
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/* All magic NFP-6xxx IMB 'mode' numbers here are from:
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* Databook (1 August 2013)
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* - System Overview and Connectivity
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* -- Internal Connectivity
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* --- Distributed Switch Fabric - Command Push/Pull (DSF-CPP) Bus
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* ---- CPP addressing
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* ----- Table 3.6. CPP Address Translation Mode Commands
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*/
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#define _NIC_NFP6000_MU_LOCALITY_DIRECT 2
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static int nfp_decode_basic(u64 addr, int *dest_island, int cpp_tgt,
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int mode, bool addr40, int isld1, int isld0)
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{
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int iid_lsb, idx_lsb;
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/* This function doesn't handle MU or CTXBP */
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if (cpp_tgt == NFP_CPP_TARGET_MU || cpp_tgt == NFP_CPP_TARGET_CT_XPB)
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return -EINVAL;
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switch (mode) {
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case 0:
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/* For VQDR, in this mode for 32-bit addressing
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* it would be islands 0, 16, 32 and 48 depending on channel
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* and upper address bits.
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* Since those are not all valid islands, most decode
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* cases would result in bad island IDs, but we do them
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* anyway since this is decoding an address that is already
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* assumed to be used as-is to get to sram.
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*/
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iid_lsb = addr40 ? 34 : 26;
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*dest_island = (addr >> iid_lsb) & 0x3F;
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return 0;
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case 1:
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/* For VQDR 32-bit, this would decode as:
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* Channel 0: island#0
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* Channel 1: island#0
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* Channel 2: island#1
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* Channel 3: island#1
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* That would be valid as long as both islands
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* have VQDR. Let's allow this.
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*/
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idx_lsb = addr40 ? 39 : 31;
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if (addr & BIT_ULL(idx_lsb))
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*dest_island = isld1;
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else
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*dest_island = isld0;
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return 0;
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case 2:
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/* For VQDR 32-bit:
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* Channel 0: (island#0 | 0)
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* Channel 1: (island#0 | 1)
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* Channel 2: (island#1 | 0)
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* Channel 3: (island#1 | 1)
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*
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* Make sure we compare against isldN values
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* by clearing the LSB.
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* This is what the silicon does.
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*/
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isld0 &= ~1;
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isld1 &= ~1;
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idx_lsb = addr40 ? 39 : 31;
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iid_lsb = idx_lsb - 1;
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if (addr & BIT_ULL(idx_lsb))
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*dest_island = isld1 | (int)((addr >> iid_lsb) & 1);
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else
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*dest_island = isld0 | (int)((addr >> iid_lsb) & 1);
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return 0;
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case 3:
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/* In this mode the data address starts to affect the island ID
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* so rather not allow it. In some really specific case
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* one could use this to send the upper half of the
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* VQDR channel to another MU, but this is getting very
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* specific.
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* However, as above for mode 0, this is the decoder
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* and the caller should validate the resulting IID.
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* This blindly does what the silicon would do.
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*/
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isld0 &= ~3;
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isld1 &= ~3;
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idx_lsb = addr40 ? 39 : 31;
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iid_lsb = idx_lsb - 2;
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if (addr & BIT_ULL(idx_lsb))
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*dest_island = isld1 | (int)((addr >> iid_lsb) & 3);
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else
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*dest_island = isld0 | (int)((addr >> iid_lsb) & 3);
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return 0;
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default:
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return -EINVAL;
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}
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}
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static int nfp_encode_basic_qdr(u64 addr, int dest_island, int cpp_tgt,
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int mode, bool addr40, int isld1, int isld0)
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{
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int v, ret;
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/* Full Island ID and channel bits overlap? */
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ret = nfp_decode_basic(addr, &v, cpp_tgt, mode, addr40, isld1, isld0);
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if (ret)
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return ret;
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/* The current address won't go where expected? */
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if (dest_island != -1 && dest_island != v)
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return -EINVAL;
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/* If dest_island was -1, we don't care where it goes. */
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return 0;
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}
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/* Try each option, take first one that fits.
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* Not sure if we would want to do some smarter
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* searching and prefer 0 or non-0 island IDs.
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*/
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static int nfp_encode_basic_search(u64 *addr, int dest_island, int *isld,
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int iid_lsb, int idx_lsb, int v_max)
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{
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int i, v;
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for (i = 0; i < 2; i++)
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for (v = 0; v < v_max; v++) {
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if (dest_island != (isld[i] | v))
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continue;
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*addr &= ~GENMASK_ULL(idx_lsb, iid_lsb);
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*addr |= ((u64)i << idx_lsb);
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*addr |= ((u64)v << iid_lsb);
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return 0;
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}
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return -ENODEV;
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}
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/* For VQDR, we may not modify the Channel bits, which might overlap
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* with the Index bit. When it does, we need to ensure that isld0 == isld1.
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*/
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static int nfp_encode_basic(u64 *addr, int dest_island, int cpp_tgt,
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int mode, bool addr40, int isld1, int isld0)
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{
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int iid_lsb, idx_lsb;
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int isld[2];
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u64 v64;
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isld[0] = isld0;
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isld[1] = isld1;
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/* This function doesn't handle MU or CTXBP */
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if (cpp_tgt == NFP_CPP_TARGET_MU || cpp_tgt == NFP_CPP_TARGET_CT_XPB)
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return -EINVAL;
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switch (mode) {
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case 0:
|
if (cpp_tgt == NFP_CPP_TARGET_QDR && !addr40)
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/* In this specific mode we'd rather not modify
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* the address but we can verify if the existing
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* contents will point to a valid island.
|
*/
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return nfp_encode_basic_qdr(*addr, cpp_tgt, dest_island,
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mode, addr40, isld1, isld0);
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iid_lsb = addr40 ? 34 : 26;
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/* <39:34> or <31:26> */
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v64 = GENMASK_ULL(iid_lsb + 5, iid_lsb);
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*addr &= ~v64;
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*addr |= ((u64)dest_island << iid_lsb) & v64;
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return 0;
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case 1:
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if (cpp_tgt == NFP_CPP_TARGET_QDR && !addr40)
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return nfp_encode_basic_qdr(*addr, cpp_tgt, dest_island,
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mode, addr40, isld1, isld0);
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idx_lsb = addr40 ? 39 : 31;
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if (dest_island == isld0) {
|
/* Only need to clear the Index bit */
|
*addr &= ~BIT_ULL(idx_lsb);
|
return 0;
|
}
|
|
if (dest_island == isld1) {
|
/* Only need to set the Index bit */
|
*addr |= BIT_ULL(idx_lsb);
|
return 0;
|
}
|
|
return -ENODEV;
|
case 2:
|
/* iid<0> = addr<30> = channel<0>
|
* channel<1> = addr<31> = Index
|
*/
|
if (cpp_tgt == NFP_CPP_TARGET_QDR && !addr40)
|
/* Special case where we allow channel bits to
|
* be set before hand and with them select an island.
|
* So we need to confirm that it's at least plausible.
|
*/
|
return nfp_encode_basic_qdr(*addr, cpp_tgt, dest_island,
|
mode, addr40, isld1, isld0);
|
|
/* Make sure we compare against isldN values
|
* by clearing the LSB.
|
* This is what the silicon does.
|
*/
|
isld[0] &= ~1;
|
isld[1] &= ~1;
|
|
idx_lsb = addr40 ? 39 : 31;
|
iid_lsb = idx_lsb - 1;
|
|
return nfp_encode_basic_search(addr, dest_island, isld,
|
iid_lsb, idx_lsb, 2);
|
case 3:
|
if (cpp_tgt == NFP_CPP_TARGET_QDR && !addr40)
|
/* iid<0> = addr<29> = data
|
* iid<1> = addr<30> = channel<0>
|
* channel<1> = addr<31> = Index
|
*/
|
return nfp_encode_basic_qdr(*addr, cpp_tgt, dest_island,
|
mode, addr40, isld1, isld0);
|
|
isld[0] &= ~3;
|
isld[1] &= ~3;
|
|
idx_lsb = addr40 ? 39 : 31;
|
iid_lsb = idx_lsb - 2;
|
|
return nfp_encode_basic_search(addr, dest_island, isld,
|
iid_lsb, idx_lsb, 4);
|
default:
|
return -EINVAL;
|
}
|
}
|
|
static int nfp_encode_mu(u64 *addr, int dest_island, int mode,
|
bool addr40, int isld1, int isld0)
|
{
|
int iid_lsb, idx_lsb, locality_lsb;
|
int isld[2];
|
u64 v64;
|
int da;
|
|
isld[0] = isld0;
|
isld[1] = isld1;
|
locality_lsb = nfp_cppat_mu_locality_lsb(mode, addr40);
|
|
if (((*addr >> locality_lsb) & 3) == _NIC_NFP6000_MU_LOCALITY_DIRECT)
|
da = 1;
|
else
|
da = 0;
|
|
switch (mode) {
|
case 0:
|
iid_lsb = addr40 ? 32 : 24;
|
v64 = GENMASK_ULL(iid_lsb + 5, iid_lsb);
|
*addr &= ~v64;
|
*addr |= (((u64)dest_island) << iid_lsb) & v64;
|
return 0;
|
case 1:
|
if (da) {
|
iid_lsb = addr40 ? 32 : 24;
|
v64 = GENMASK_ULL(iid_lsb + 5, iid_lsb);
|
*addr &= ~v64;
|
*addr |= (((u64)dest_island) << iid_lsb) & v64;
|
return 0;
|
}
|
|
idx_lsb = addr40 ? 37 : 29;
|
if (dest_island == isld0) {
|
*addr &= ~BIT_ULL(idx_lsb);
|
return 0;
|
}
|
|
if (dest_island == isld1) {
|
*addr |= BIT_ULL(idx_lsb);
|
return 0;
|
}
|
|
return -ENODEV;
|
case 2:
|
if (da) {
|
iid_lsb = addr40 ? 32 : 24;
|
v64 = GENMASK_ULL(iid_lsb + 5, iid_lsb);
|
*addr &= ~v64;
|
*addr |= (((u64)dest_island) << iid_lsb) & v64;
|
return 0;
|
}
|
|
/* Make sure we compare against isldN values
|
* by clearing the LSB.
|
* This is what the silicon does.
|
*/
|
isld[0] &= ~1;
|
isld[1] &= ~1;
|
|
idx_lsb = addr40 ? 37 : 29;
|
iid_lsb = idx_lsb - 1;
|
|
return nfp_encode_basic_search(addr, dest_island, isld,
|
iid_lsb, idx_lsb, 2);
|
case 3:
|
/* Only the EMU will use 40 bit addressing. Silently
|
* set the direct locality bit for everyone else.
|
* The SDK toolchain uses dest_island <= 0 to test
|
* for atypical address encodings to support access
|
* to local-island CTM with a 32-but address (high-locality
|
* is effewctively ignored and just used for
|
* routing to island #0).
|
*/
|
if (dest_island > 0 && (dest_island < 24 || dest_island > 26)) {
|
*addr |= ((u64)_NIC_NFP6000_MU_LOCALITY_DIRECT)
|
<< locality_lsb;
|
da = 1;
|
}
|
|
if (da) {
|
iid_lsb = addr40 ? 32 : 24;
|
v64 = GENMASK_ULL(iid_lsb + 5, iid_lsb);
|
*addr &= ~v64;
|
*addr |= (((u64)dest_island) << iid_lsb) & v64;
|
return 0;
|
}
|
|
isld[0] &= ~3;
|
isld[1] &= ~3;
|
|
idx_lsb = addr40 ? 37 : 29;
|
iid_lsb = idx_lsb - 2;
|
|
return nfp_encode_basic_search(addr, dest_island, isld,
|
iid_lsb, idx_lsb, 4);
|
default:
|
return -EINVAL;
|
}
|
}
|
|
static int nfp_cppat_addr_encode(u64 *addr, int dest_island, int cpp_tgt,
|
int mode, bool addr40, int isld1, int isld0)
|
{
|
switch (cpp_tgt) {
|
case NFP_CPP_TARGET_NBI:
|
case NFP_CPP_TARGET_QDR:
|
case NFP_CPP_TARGET_ILA:
|
case NFP_CPP_TARGET_PCIE:
|
case NFP_CPP_TARGET_ARM:
|
case NFP_CPP_TARGET_CRYPTO:
|
case NFP_CPP_TARGET_CLS:
|
return nfp_encode_basic(addr, dest_island, cpp_tgt, mode,
|
addr40, isld1, isld0);
|
|
case NFP_CPP_TARGET_MU:
|
return nfp_encode_mu(addr, dest_island, mode,
|
addr40, isld1, isld0);
|
|
case NFP_CPP_TARGET_CT_XPB:
|
if (mode != 1 || addr40)
|
return -EINVAL;
|
*addr &= ~GENMASK_ULL(29, 24);
|
*addr |= ((u64)dest_island << 24) & GENMASK_ULL(29, 24);
|
return 0;
|
default:
|
return -EINVAL;
|
}
|
}
|
|
int nfp_target_cpp(u32 cpp_island_id, u64 cpp_island_address,
|
u32 *cpp_target_id, u64 *cpp_target_address,
|
const u32 *imb_table)
|
{
|
const int island = NFP_CPP_ID_ISLAND_of(cpp_island_id);
|
const int target = NFP_CPP_ID_TARGET_of(cpp_island_id);
|
u32 imb;
|
int err;
|
|
if (target < 0 || target >= 16) {
|
pr_err("Invalid CPP target: %d\n", target);
|
return -EINVAL;
|
}
|
|
if (island == 0) {
|
/* Already translated */
|
*cpp_target_id = cpp_island_id;
|
*cpp_target_address = cpp_island_address;
|
return 0;
|
}
|
|
/* CPP + Island only allowed on systems with IMB tables */
|
if (!imb_table)
|
return -EINVAL;
|
|
imb = imb_table[target];
|
|
*cpp_target_address = cpp_island_address;
|
err = nfp_cppat_addr_encode(cpp_target_address, island, target,
|
((imb >> 13) & 7), ((imb >> 12) & 1),
|
((imb >> 6) & 0x3f), ((imb >> 0) & 0x3f));
|
if (err) {
|
pr_err("Can't encode CPP address: %d\n", err);
|
return err;
|
}
|
|
*cpp_target_id = NFP_CPP_ID(target,
|
NFP_CPP_ID_ACTION_of(cpp_island_id),
|
NFP_CPP_ID_TOKEN_of(cpp_island_id));
|
|
return 0;
|
}
|
