/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "priv.h"
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#include "fuc/gt215.fuc3.h"
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#include <core/client.h>
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#include <core/enum.h>
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#include <core/gpuobj.h>
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#include <engine/fifo.h>
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#include <nvif/class.h>
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static const struct nvkm_enum
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gt215_ce_isr_error_name[] = {
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{ 0x0001, "ILLEGAL_MTHD" },
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{ 0x0002, "INVALID_ENUM" },
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{ 0x0003, "INVALID_BITFIELD" },
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{}
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};
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void
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gt215_ce_intr(struct nvkm_falcon *ce, struct nvkm_fifo_chan *chan)
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{
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struct nvkm_subdev *subdev = &ce->engine.subdev;
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struct nvkm_device *device = subdev->device;
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const u32 base = (subdev->index - NVKM_ENGINE_CE0) * 0x1000;
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u32 ssta = nvkm_rd32(device, 0x104040 + base) & 0x0000ffff;
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u32 addr = nvkm_rd32(device, 0x104040 + base) >> 16;
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u32 mthd = (addr & 0x07ff) << 2;
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u32 subc = (addr & 0x3800) >> 11;
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u32 data = nvkm_rd32(device, 0x104044 + base);
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const struct nvkm_enum *en =
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nvkm_enum_find(gt215_ce_isr_error_name, ssta);
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nvkm_error(subdev, "DISPATCH_ERROR %04x [%s] ch %d [%010llx %s] "
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"subc %d mthd %04x data %08x\n", ssta,
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en ? en->name : "", chan ? chan->chid : -1,
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chan ? chan->inst->addr : 0,
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chan ? chan->object.client->name : "unknown",
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subc, mthd, data);
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}
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static const struct nvkm_falcon_func
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gt215_ce = {
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.code.data = gt215_ce_code,
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.code.size = sizeof(gt215_ce_code),
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.data.data = gt215_ce_data,
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.data.size = sizeof(gt215_ce_data),
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.intr = gt215_ce_intr,
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.sclass = {
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{ -1, -1, GT212_DMA },
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{}
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}
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};
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int
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gt215_ce_new(struct nvkm_device *device, int index,
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struct nvkm_engine **pengine)
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{
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return nvkm_falcon_new_(>215_ce, device, index,
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(device->chipset != 0xaf), 0x104000, pengine);
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}
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