/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include <core/gpuobj.h>
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#include <core/engine.h>
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#include <subdev/instmem.h>
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#include <subdev/bar.h>
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#include <subdev/mmu.h>
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/* fast-path, where backend is able to provide direct pointer to memory */
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static u32
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nvkm_gpuobj_rd32_fast(struct nvkm_gpuobj *gpuobj, u32 offset)
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{
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return ioread32_native(gpuobj->map + offset);
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}
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static void
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nvkm_gpuobj_wr32_fast(struct nvkm_gpuobj *gpuobj, u32 offset, u32 data)
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{
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iowrite32_native(data, gpuobj->map + offset);
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}
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/* accessor functions for gpuobjs allocated directly from instmem */
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static int
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nvkm_gpuobj_heap_map(struct nvkm_gpuobj *gpuobj, u64 offset,
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struct nvkm_vmm *vmm, struct nvkm_vma *vma,
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void *argv, u32 argc)
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{
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return nvkm_memory_map(gpuobj->memory, offset, vmm, vma, argv, argc);
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}
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static u32
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nvkm_gpuobj_heap_rd32(struct nvkm_gpuobj *gpuobj, u32 offset)
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{
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return nvkm_ro32(gpuobj->memory, offset);
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}
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static void
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nvkm_gpuobj_heap_wr32(struct nvkm_gpuobj *gpuobj, u32 offset, u32 data)
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{
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nvkm_wo32(gpuobj->memory, offset, data);
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}
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static const struct nvkm_gpuobj_func nvkm_gpuobj_heap;
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static void
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nvkm_gpuobj_heap_release(struct nvkm_gpuobj *gpuobj)
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{
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gpuobj->func = &nvkm_gpuobj_heap;
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nvkm_done(gpuobj->memory);
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}
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static const struct nvkm_gpuobj_func
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nvkm_gpuobj_heap_fast = {
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.release = nvkm_gpuobj_heap_release,
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.rd32 = nvkm_gpuobj_rd32_fast,
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.wr32 = nvkm_gpuobj_wr32_fast,
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.map = nvkm_gpuobj_heap_map,
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};
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static const struct nvkm_gpuobj_func
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nvkm_gpuobj_heap_slow = {
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.release = nvkm_gpuobj_heap_release,
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.rd32 = nvkm_gpuobj_heap_rd32,
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.wr32 = nvkm_gpuobj_heap_wr32,
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.map = nvkm_gpuobj_heap_map,
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};
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static void *
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nvkm_gpuobj_heap_acquire(struct nvkm_gpuobj *gpuobj)
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{
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gpuobj->map = nvkm_kmap(gpuobj->memory);
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if (likely(gpuobj->map))
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gpuobj->func = &nvkm_gpuobj_heap_fast;
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else
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gpuobj->func = &nvkm_gpuobj_heap_slow;
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return gpuobj->map;
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}
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static const struct nvkm_gpuobj_func
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nvkm_gpuobj_heap = {
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.acquire = nvkm_gpuobj_heap_acquire,
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.map = nvkm_gpuobj_heap_map,
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};
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/* accessor functions for gpuobjs sub-allocated from a parent gpuobj */
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static int
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nvkm_gpuobj_map(struct nvkm_gpuobj *gpuobj, u64 offset,
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struct nvkm_vmm *vmm, struct nvkm_vma *vma,
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void *argv, u32 argc)
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{
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return nvkm_memory_map(gpuobj->parent, gpuobj->node->offset + offset,
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vmm, vma, argv, argc);
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}
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static u32
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nvkm_gpuobj_rd32(struct nvkm_gpuobj *gpuobj, u32 offset)
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{
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return nvkm_ro32(gpuobj->parent, gpuobj->node->offset + offset);
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}
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static void
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nvkm_gpuobj_wr32(struct nvkm_gpuobj *gpuobj, u32 offset, u32 data)
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{
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nvkm_wo32(gpuobj->parent, gpuobj->node->offset + offset, data);
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}
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static const struct nvkm_gpuobj_func nvkm_gpuobj_func;
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static void
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nvkm_gpuobj_release(struct nvkm_gpuobj *gpuobj)
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{
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gpuobj->func = &nvkm_gpuobj_func;
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nvkm_done(gpuobj->parent);
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}
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static const struct nvkm_gpuobj_func
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nvkm_gpuobj_fast = {
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.release = nvkm_gpuobj_release,
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.rd32 = nvkm_gpuobj_rd32_fast,
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.wr32 = nvkm_gpuobj_wr32_fast,
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.map = nvkm_gpuobj_map,
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};
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static const struct nvkm_gpuobj_func
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nvkm_gpuobj_slow = {
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.release = nvkm_gpuobj_release,
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.rd32 = nvkm_gpuobj_rd32,
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.wr32 = nvkm_gpuobj_wr32,
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.map = nvkm_gpuobj_map,
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};
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static void *
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nvkm_gpuobj_acquire(struct nvkm_gpuobj *gpuobj)
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{
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gpuobj->map = nvkm_kmap(gpuobj->parent);
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if (likely(gpuobj->map)) {
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gpuobj->map = (u8 *)gpuobj->map + gpuobj->node->offset;
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gpuobj->func = &nvkm_gpuobj_fast;
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} else {
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gpuobj->func = &nvkm_gpuobj_slow;
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}
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return gpuobj->map;
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}
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static const struct nvkm_gpuobj_func
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nvkm_gpuobj_func = {
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.acquire = nvkm_gpuobj_acquire,
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.map = nvkm_gpuobj_map,
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};
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static int
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nvkm_gpuobj_ctor(struct nvkm_device *device, u32 size, int align, bool zero,
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struct nvkm_gpuobj *parent, struct nvkm_gpuobj *gpuobj)
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{
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u32 offset;
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int ret;
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if (parent) {
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if (align >= 0) {
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ret = nvkm_mm_head(&parent->heap, 0, 1, size, size,
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max(align, 1), &gpuobj->node);
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} else {
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ret = nvkm_mm_tail(&parent->heap, 0, 1, size, size,
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-align, &gpuobj->node);
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}
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if (ret)
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return ret;
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gpuobj->parent = parent;
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gpuobj->func = &nvkm_gpuobj_func;
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gpuobj->addr = parent->addr + gpuobj->node->offset;
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gpuobj->size = gpuobj->node->length;
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if (zero) {
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nvkm_kmap(gpuobj);
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for (offset = 0; offset < gpuobj->size; offset += 4)
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nvkm_wo32(gpuobj, offset, 0x00000000);
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nvkm_done(gpuobj);
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}
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} else {
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ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, size,
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abs(align), zero, &gpuobj->memory);
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if (ret)
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return ret;
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gpuobj->func = &nvkm_gpuobj_heap;
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gpuobj->addr = nvkm_memory_addr(gpuobj->memory);
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gpuobj->size = nvkm_memory_size(gpuobj->memory);
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}
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return nvkm_mm_init(&gpuobj->heap, 0, 0, gpuobj->size, 1);
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}
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void
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nvkm_gpuobj_del(struct nvkm_gpuobj **pgpuobj)
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{
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struct nvkm_gpuobj *gpuobj = *pgpuobj;
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if (gpuobj) {
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if (gpuobj->parent)
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nvkm_mm_free(&gpuobj->parent->heap, &gpuobj->node);
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nvkm_mm_fini(&gpuobj->heap);
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nvkm_memory_unref(&gpuobj->memory);
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kfree(*pgpuobj);
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*pgpuobj = NULL;
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}
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}
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int
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nvkm_gpuobj_new(struct nvkm_device *device, u32 size, int align, bool zero,
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struct nvkm_gpuobj *parent, struct nvkm_gpuobj **pgpuobj)
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{
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struct nvkm_gpuobj *gpuobj;
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int ret;
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if (!(gpuobj = *pgpuobj = kzalloc(sizeof(*gpuobj), GFP_KERNEL)))
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return -ENOMEM;
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ret = nvkm_gpuobj_ctor(device, size, align, zero, parent, gpuobj);
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if (ret)
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nvkm_gpuobj_del(pgpuobj);
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return ret;
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}
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/* the below is basically only here to support sharing the paged dma object
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* for PCI(E)GART on <=nv4x chipsets, and should *not* be expected to work
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* anywhere else.
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*/
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int
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nvkm_gpuobj_wrap(struct nvkm_memory *memory, struct nvkm_gpuobj **pgpuobj)
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{
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if (!(*pgpuobj = kzalloc(sizeof(**pgpuobj), GFP_KERNEL)))
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return -ENOMEM;
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(*pgpuobj)->addr = nvkm_memory_addr(memory);
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(*pgpuobj)->size = nvkm_memory_size(memory);
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return 0;
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}
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void
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nvkm_gpuobj_memcpy_to(struct nvkm_gpuobj *dst, u32 dstoffset, void *src,
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u32 length)
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{
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int i;
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for (i = 0; i < length; i += 4)
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nvkm_wo32(dst, dstoffset + i, *(u32 *)(src + i));
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}
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void
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nvkm_gpuobj_memcpy_from(void *dst, struct nvkm_gpuobj *src, u32 srcoffset,
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u32 length)
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{
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int i;
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for (i = 0; i < length; i += 4)
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((u32 *)src)[i / 4] = nvkm_ro32(src, srcoffset + i);
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}
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