/*
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* SPDX-License-Identifier: MIT
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*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef INTEL_RING_TYPES_H
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#define INTEL_RING_TYPES_H
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#include <linux/atomic.h>
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#include <linux/kref.h>
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#include <linux/types.h>
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/*
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* Early gen2 devices have a cacheline of just 32 bytes, using 64 is overkill,
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* but keeps the logic simple. Indeed, the whole purpose of this macro is just
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* to give some inclination as to some of the magic values used in the various
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* workarounds!
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*/
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#define CACHELINE_BYTES 64
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#define CACHELINE_DWORDS (CACHELINE_BYTES / sizeof(u32))
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struct i915_vma;
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struct intel_ring {
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struct kref ref;
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struct i915_vma *vma;
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void *vaddr;
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/*
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* As we have two types of rings, one global to the engine used
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* by ringbuffer submission and those that are exclusive to a
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* context used by execlists, we have to play safe and allow
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* atomic updates to the pin_count. However, the actual pinning
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* of the context is either done during initialisation for
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* ringbuffer submission or serialised as part of the context
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* pinning for execlists, and so we do not need a mutex ourselves
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* to serialise intel_ring_pin/intel_ring_unpin.
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*/
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atomic_t pin_count;
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u32 head; /* updated during retire, loosely tracks RING_HEAD */
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u32 tail; /* updated on submission, used for RING_TAIL */
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u32 emit; /* updated during request construction */
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u32 space;
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u32 size;
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u32 wrap;
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u32 effective_size;
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};
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#endif /* INTEL_RING_TYPES_H */
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