/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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*/
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/*
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* Authors:
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* Christian König <deathsimple@vodafone.de>
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*/
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#include <linux/uaccess.h>
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#include "amdgpu.h"
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#include "amdgpu_trace.h"
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#define AMDGPU_BO_LIST_MAX_PRIORITY 32u
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#define AMDGPU_BO_LIST_NUM_BUCKETS (AMDGPU_BO_LIST_MAX_PRIORITY + 1)
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static void amdgpu_bo_list_free_rcu(struct rcu_head *rcu)
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{
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struct amdgpu_bo_list *list = container_of(rcu, struct amdgpu_bo_list,
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rhead);
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kvfree(list);
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}
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static void amdgpu_bo_list_free(struct kref *ref)
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{
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struct amdgpu_bo_list *list = container_of(ref, struct amdgpu_bo_list,
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refcount);
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struct amdgpu_bo_list_entry *e;
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amdgpu_bo_list_for_each_entry(e, list) {
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struct amdgpu_bo *bo = ttm_to_amdgpu_bo(e->tv.bo);
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amdgpu_bo_unref(&bo);
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}
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call_rcu(&list->rhead, amdgpu_bo_list_free_rcu);
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}
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int amdgpu_bo_list_create(struct amdgpu_device *adev, struct drm_file *filp,
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struct drm_amdgpu_bo_list_entry *info,
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size_t num_entries, struct amdgpu_bo_list **result)
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{
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unsigned last_entry = 0, first_userptr = num_entries;
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struct amdgpu_bo_list_entry *array;
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struct amdgpu_bo_list *list;
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uint64_t total_size = 0;
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size_t size;
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unsigned i;
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int r;
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if (num_entries > (SIZE_MAX - sizeof(struct amdgpu_bo_list))
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/ sizeof(struct amdgpu_bo_list_entry))
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return -EINVAL;
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size = sizeof(struct amdgpu_bo_list);
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size += num_entries * sizeof(struct amdgpu_bo_list_entry);
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list = kvmalloc(size, GFP_KERNEL);
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if (!list)
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return -ENOMEM;
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kref_init(&list->refcount);
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list->gds_obj = NULL;
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list->gws_obj = NULL;
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list->oa_obj = NULL;
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array = amdgpu_bo_list_array_entry(list, 0);
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memset(array, 0, num_entries * sizeof(struct amdgpu_bo_list_entry));
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for (i = 0; i < num_entries; ++i) {
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struct amdgpu_bo_list_entry *entry;
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struct drm_gem_object *gobj;
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struct amdgpu_bo *bo;
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struct mm_struct *usermm;
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gobj = drm_gem_object_lookup(filp, info[i].bo_handle);
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if (!gobj) {
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r = -ENOENT;
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goto error_free;
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}
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bo = amdgpu_bo_ref(gem_to_amdgpu_bo(gobj));
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drm_gem_object_put(gobj);
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usermm = amdgpu_ttm_tt_get_usermm(bo->tbo.ttm);
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if (usermm) {
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if (usermm != current->mm) {
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amdgpu_bo_unref(&bo);
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r = -EPERM;
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goto error_free;
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}
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entry = &array[--first_userptr];
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} else {
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entry = &array[last_entry++];
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}
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entry->priority = min(info[i].bo_priority,
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AMDGPU_BO_LIST_MAX_PRIORITY);
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entry->tv.bo = &bo->tbo;
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if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_GDS)
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list->gds_obj = bo;
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if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_GWS)
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list->gws_obj = bo;
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if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_OA)
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list->oa_obj = bo;
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total_size += amdgpu_bo_size(bo);
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trace_amdgpu_bo_list_set(list, bo);
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}
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list->first_userptr = first_userptr;
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list->num_entries = num_entries;
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trace_amdgpu_cs_bo_status(list->num_entries, total_size);
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*result = list;
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return 0;
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error_free:
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for (i = 0; i < last_entry; ++i) {
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struct amdgpu_bo *bo = ttm_to_amdgpu_bo(array[i].tv.bo);
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amdgpu_bo_unref(&bo);
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}
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for (i = first_userptr; i < num_entries; ++i) {
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struct amdgpu_bo *bo = ttm_to_amdgpu_bo(array[i].tv.bo);
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amdgpu_bo_unref(&bo);
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}
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kvfree(list);
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return r;
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}
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static void amdgpu_bo_list_destroy(struct amdgpu_fpriv *fpriv, int id)
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{
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struct amdgpu_bo_list *list;
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mutex_lock(&fpriv->bo_list_lock);
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list = idr_remove(&fpriv->bo_list_handles, id);
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mutex_unlock(&fpriv->bo_list_lock);
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if (list)
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kref_put(&list->refcount, amdgpu_bo_list_free);
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}
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int amdgpu_bo_list_get(struct amdgpu_fpriv *fpriv, int id,
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struct amdgpu_bo_list **result)
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{
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rcu_read_lock();
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*result = idr_find(&fpriv->bo_list_handles, id);
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if (*result && kref_get_unless_zero(&(*result)->refcount)) {
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rcu_read_unlock();
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return 0;
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}
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rcu_read_unlock();
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return -ENOENT;
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}
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void amdgpu_bo_list_get_list(struct amdgpu_bo_list *list,
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struct list_head *validated)
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{
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/* This is based on the bucket sort with O(n) time complexity.
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* An item with priority "i" is added to bucket[i]. The lists are then
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* concatenated in descending order.
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*/
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struct list_head bucket[AMDGPU_BO_LIST_NUM_BUCKETS];
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struct amdgpu_bo_list_entry *e;
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unsigned i;
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for (i = 0; i < AMDGPU_BO_LIST_NUM_BUCKETS; i++)
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INIT_LIST_HEAD(&bucket[i]);
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/* Since buffers which appear sooner in the relocation list are
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* likely to be used more often than buffers which appear later
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* in the list, the sort mustn't change the ordering of buffers
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* with the same priority, i.e. it must be stable.
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*/
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amdgpu_bo_list_for_each_entry(e, list) {
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struct amdgpu_bo *bo = ttm_to_amdgpu_bo(e->tv.bo);
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unsigned priority = e->priority;
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if (!bo->parent)
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list_add_tail(&e->tv.head, &bucket[priority]);
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e->user_pages = NULL;
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}
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/* Connect the sorted buckets in the output list. */
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for (i = 0; i < AMDGPU_BO_LIST_NUM_BUCKETS; i++)
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list_splice(&bucket[i], validated);
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}
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void amdgpu_bo_list_put(struct amdgpu_bo_list *list)
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{
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kref_put(&list->refcount, amdgpu_bo_list_free);
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}
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int amdgpu_bo_create_list_entry_array(struct drm_amdgpu_bo_list_in *in,
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struct drm_amdgpu_bo_list_entry **info_param)
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{
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const void __user *uptr = u64_to_user_ptr(in->bo_info_ptr);
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const uint32_t info_size = sizeof(struct drm_amdgpu_bo_list_entry);
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struct drm_amdgpu_bo_list_entry *info;
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int r;
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info = kvmalloc_array(in->bo_number, info_size, GFP_KERNEL);
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if (!info)
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return -ENOMEM;
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/* copy the handle array from userspace to a kernel buffer */
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r = -EFAULT;
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if (likely(info_size == in->bo_info_size)) {
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unsigned long bytes = in->bo_number *
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in->bo_info_size;
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if (copy_from_user(info, uptr, bytes))
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goto error_free;
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} else {
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unsigned long bytes = min(in->bo_info_size, info_size);
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unsigned i;
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memset(info, 0, in->bo_number * info_size);
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for (i = 0; i < in->bo_number; ++i) {
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if (copy_from_user(&info[i], uptr, bytes))
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goto error_free;
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uptr += in->bo_info_size;
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}
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}
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*info_param = info;
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return 0;
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error_free:
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kvfree(info);
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return r;
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}
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int amdgpu_bo_list_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp)
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{
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struct amdgpu_device *adev = drm_to_adev(dev);
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struct amdgpu_fpriv *fpriv = filp->driver_priv;
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union drm_amdgpu_bo_list *args = data;
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uint32_t handle = args->in.list_handle;
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struct drm_amdgpu_bo_list_entry *info = NULL;
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struct amdgpu_bo_list *list, *old;
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int r;
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r = amdgpu_bo_create_list_entry_array(&args->in, &info);
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if (r)
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return r;
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switch (args->in.operation) {
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case AMDGPU_BO_LIST_OP_CREATE:
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r = amdgpu_bo_list_create(adev, filp, info, args->in.bo_number,
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&list);
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if (r)
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goto error_free;
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mutex_lock(&fpriv->bo_list_lock);
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r = idr_alloc(&fpriv->bo_list_handles, list, 1, 0, GFP_KERNEL);
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mutex_unlock(&fpriv->bo_list_lock);
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if (r < 0) {
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goto error_put_list;
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}
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handle = r;
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break;
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case AMDGPU_BO_LIST_OP_DESTROY:
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amdgpu_bo_list_destroy(fpriv, handle);
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handle = 0;
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break;
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case AMDGPU_BO_LIST_OP_UPDATE:
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r = amdgpu_bo_list_create(adev, filp, info, args->in.bo_number,
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&list);
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if (r)
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goto error_free;
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mutex_lock(&fpriv->bo_list_lock);
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old = idr_replace(&fpriv->bo_list_handles, list, handle);
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mutex_unlock(&fpriv->bo_list_lock);
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if (IS_ERR(old)) {
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r = PTR_ERR(old);
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goto error_put_list;
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}
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amdgpu_bo_list_put(old);
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break;
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default:
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r = -EINVAL;
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goto error_free;
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}
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memset(args, 0, sizeof(*args));
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args->out.list_handle = handle;
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kvfree(info);
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return 0;
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error_put_list:
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amdgpu_bo_list_put(list);
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error_free:
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kvfree(info);
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return r;
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}
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