/*
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* Copyright 2015 Rockchip Electronics Co. LTD
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __MPP_RGA_H__
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#define __MPP_RGA_H__
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/* NOTE: RGA support sync mode and async mode. We use sync mode only. */
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#define RGA_BLIT_SYNC 0x5017
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#define RGA_BLIT_ASYNC 0x5018
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#define RGA_FLUSH 0x5019
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#define RGA_GET_RESULT 0x501a
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typedef enum RgaFormat_e {
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RGA_FMT_RGBA_8888 = 0x0,
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RGA_FMT_RGBX_8888 = 0x1,
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RGA_FMT_RGB_888 = 0x2,
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RGA_FMT_BGRA_8888 = 0x3,
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RGA_FMT_RGB_565 = 0x4,
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RGA_FMT_RGBA_5551 = 0x5,
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RGA_FMT_RGBA_4444 = 0x6,
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RGA_FMT_BGR_888 = 0x7,
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RGA_FMT_YCbCr_422_SP = 0x8,
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RGA_FMT_YCbCr_422_P = 0x9,
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RGA_FMT_YCbCr_420_SP = 0xa,
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RGA_FMT_YCbCr_420_P = 0xb,
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RGA_FMT_YCrCb_422_SP = 0xc,
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RGA_FMT_YCrCb_422_P = 0xd,
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RGA_FMT_YCrCb_420_SP = 0xe,
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RGA_FMT_YCrCb_420_P = 0xf,
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RGA_FMT_BPP1 = 0x10,
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RGA_FMT_BPP2 = 0x11,
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RGA_FMT_BPP4 = 0x12,
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RGA_FMT_BPP8 = 0x13,
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RGA_FMT_BUTT,
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} RgaFormat;
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typedef struct RgaImg_t {
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RK_ULONG yrgb_addr; /* yrgb addr */
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RK_ULONG uv_addr; /* cb/cr addr */
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RK_ULONG v_addr; /* cr addr */
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RK_U32 format; // definition by RgaFormat
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RK_U16 act_w; // width
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RK_U16 act_h; // height
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RK_U16 x_offset; // offset from left
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RK_U16 y_offset; // offset from top
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RK_U16 vir_w; // horizontal stride
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RK_U16 vir_h; // vertical stride
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RK_U16 endian_mode; // for BPP
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RK_U16 alpha_swap;
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} RgaImg;
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typedef struct RgaRect_t {
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RK_U16 xmin;
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RK_U16 xmax;
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RK_U16 ymin;
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RK_U16 ymax;
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} RgaRect;
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typedef struct RgaPoint_t {
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RK_U16 x;
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RK_U16 y;
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} RgaPoint;
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typedef struct RgaColorFill_t {
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RK_S16 gr_x_a;
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RK_S16 gr_y_a;
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RK_S16 gr_x_b;
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RK_S16 gr_y_b;
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RK_S16 gr_x_g;
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RK_S16 gr_y_g;
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RK_S16 gr_x_r;
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RK_S16 gr_y_r;
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} RgaColorFill;
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typedef struct RgaLineDraw_t {
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RgaPoint start_point;
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RgaPoint end_point;
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RK_U32 color;
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RK_U32 flag;
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RK_U32 line_width;
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} RgaLineDraw;
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typedef struct RgaFading_t {
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RK_U8 b;
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RK_U8 g;
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RK_U8 r;
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RK_U8 res;
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} RgaFading;
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typedef struct RgaMmu_t {
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RK_U8 mmu_en;
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RK_ULONG base_addr;
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RK_U32 mmu_flag;
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} RgaMmu;
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// structure for userspace / kernel communication
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typedef struct RgaRequest_t {
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RK_U8 render_mode;
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RgaImg src;
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RgaImg dst;
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RgaImg pat;
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RK_ULONG rop_mask_addr; /* rop4 mask addr */
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RK_ULONG LUT_addr; /* LUT addr */
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RgaRect clip; /* dst clip window default value is dst_vir */
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/* value from [0, w-1] / [0, h-1]*/
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RK_S32 sina; /* dst angle default value 0 16.16 scan from table */
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RK_S32 cosa; /* dst angle default value 0 16.16 scan from table */
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/* alpha rop process flag */
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/* ([0] = 1 alpha_rop_enable) */
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/* ([1] = 1 rop enable) */
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/* ([2] = 1 fading_enable) */
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/* ([3] = 1 PD_enable) */
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/* ([4] = 1 alpha cal_mode_sel) */
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/* ([5] = 1 dither_enable) */
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/* ([6] = 1 gradient fill mode sel) */
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/* ([7] = 1 AA_enable) */
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RK_U16 alpha_rop_flag;
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RK_U8 scale_mode; /* 0 nearst / 1 bilnear / 2 bicubic */
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RK_U32 color_key_max; /* color key max */
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RK_U32 color_key_min; /* color key min */
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RK_U32 fg_color; /* foreground color */
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RK_U32 bg_color; /* background color */
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RgaColorFill gr_color; /* color fill use gradient */
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RgaLineDraw line_draw_info;
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RgaFading fading;
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RK_U8 PD_mode; /* porter duff alpha mode sel */
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RK_U8 alpha_global_value; /* global alpha value */
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RK_U16 rop_code; /* rop2/3/4 code scan from rop code table*/
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RK_U8 bsfilter_flag; /* [2] 0 blur 1 sharp / [1:0] filter_type*/
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RK_U8 palette_mode; /* (enum) color palatte 0/1bpp, 1/2bpp 2/4bpp 3/8bpp */
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RK_U8 yuv2rgb_mode; /* (enum) BT.601 MPEG / BT.601 JPEG / BT.709 */
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RK_U8 endian_mode;
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/* (enum) rotate mode */
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/* 0x0, no rotate */
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/* 0x1, rotate */
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/* 0x2, x_mirror */
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/* 0x3, y_mirror */
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RK_U8 rotate_mode;
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RK_U8 color_fill_mode; /* 0 solid color / 1 patten color */
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RgaMmu mmu_info; /* mmu information */
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/* ([0~1] alpha mode) */
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/* ([2~3] rop mode) */
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/* ([4] zero mode en) */
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/* ([5] dst alpha mode) */
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RK_U8 alpha_rop_mode;
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RK_U8 src_trans_mode;
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RK_U8 CMD_fin_int_enable;
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/* completion is reported through a callback */
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void (*complete)(int retval);
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} RgaReq;
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#endif // __MPP_RGA_H__
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