/*
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* Copyright Intel Corporation (C) 2017. All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* Reset binding definitions for Altera Arria10 MAX5 System Resource Chip
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*
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* Adapted from altr,rst-mgr-a10.h
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*/
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#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H
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#define _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H
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/* Peripheral PHY resets */
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#define A10SR_RESET_ENET_HPS 0
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#define A10SR_RESET_PCIE 1
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#define A10SR_RESET_FILE 2
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#define A10SR_RESET_BQSPI 3
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#define A10SR_RESET_USB 4
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#define A10SR_RESET_NUM 5
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#endif
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