/*-
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* Copyright 2013 Broadcom Corporation
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*
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* Copyright (c) 2009-2010 Micron Technology, Inc.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Henry Pan <hspan@micron.com>
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*
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* based on nand.h
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*/
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#ifndef __LINUX_MTD_SPI_NAND_H
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#define __LINUX_MTD_SPI_NAND_H
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#include <linux/wait.h>
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#include <linux/spinlock.h>
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#include <linux/mtd/mtd.h>
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/* cmd */
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#define CMD_READ 0x13
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#define CMD_READ_RDM 0x03
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#define CMD_PROG_PAGE_CLRCACHE 0x02
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#define CMD_PROG_PAGE 0x84
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#define CMD_PROG_PAGE_EXC 0x10
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#define CMD_ERASE_BLK 0xd8
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#define CMD_WR_ENABLE 0x06
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#define CMD_WR_DISABLE 0x04
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#define CMD_READ_ID 0x9f
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#define CMD_RESET 0xff
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#define CMD_READ_REG 0x0f
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#define CMD_WRITE_REG 0x1f
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/* feature/ status reg */
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#define REG_BLOCK_LOCK 0xa0
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#define REG_OTP 0xb0
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#define REG_STATUS 0xc0/* timing */
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/* status */
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#define STATUS_OIP_MASK 0x01
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#define STATUS_READY 0
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#define STATUS_BUSY BIT(0)
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#define STATUS_E_FAIL_MASK 0x04
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#define STATUS_E_FAIL BIT(2)
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#define STATUS_P_FAIL_MASK 0x08
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#define STATUS_P_FAIL BIT(3)
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#define STATUS_ECC_MASK 0x30
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#define STATUS_ECC_1BIT_CORRECTED BIT(4)
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#define STATUS_ECC_ERROR BIT(5)
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#define STATUS_ECC_RESERVED (BIT(5) | BIT(4))
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/*ECC enable defines*/
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#define OTP_ECC_MASK 0x10
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#define OTP_ECC_OFF 0
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#define OTP_ECC_ON 1
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#define ECC_DISABLED
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#define ECC_IN_NAND
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#define ECC_SOFT
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/* block lock */
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#define BL_ALL_LOCKED 0x38
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#define BL_1_2_LOCKED 0x30
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#define BL_1_4_LOCKED 0x28
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#define BL_1_8_LOCKED 0x20
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#define BL_1_16_LOCKED 0x18
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#define BL_1_32_LOCKED 0x10
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#define BL_1_64_LOCKED 0x08
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#define BL_ALL_UNLOCKED 0
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struct spinand_info {
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struct spi_device *spi;
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void *priv;
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};
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struct spinand_state {
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u32 col;
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u32 row;
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int buf_ptr;
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u8 *buf;
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};
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struct spinand_cmd {
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u8 cmd;
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u32 n_addr; /* Number of address */
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u8 addr[3]; /* Reg Offset */
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u32 n_dummy; /* Dummy use */
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u32 n_tx; /* Number of tx bytes */
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u8 *tx_buf; /* Tx buf */
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u32 n_rx; /* Number of rx bytes */
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u8 *rx_buf; /* Rx buf */
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};
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int spinand_mtd(struct mtd_info *mtd);
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void spinand_mtd_release(struct mtd_info *mtd);
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#endif /* __LINUX_MTD_SPI_NAND_H */
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