/****************************************************************************
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*
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* Realmode X86 Emulator Library
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*
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* Copyright (C) 1991-2004 SciTech Software, Inc.
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* Copyright (C) David Mosberger-Tang
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* Copyright (C) 1999 Egbert Eich
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*
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* ========================================================================
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*
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* Permission to use, copy, modify, distribute, and sell this software and
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* its documentation for any purpose is hereby granted without fee,
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* provided that the above copyright notice appear in all copies and that
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* both that copyright notice and this permission notice appear in
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* supporting documentation, and that the name of the authors not be used
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* in advertising or publicity pertaining to distribution of the software
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* without specific, written prior permission. The authors makes no
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* representations about the suitability of this software for any purpose.
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* It is provided "as is" without express or implied warranty.
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*
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* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
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* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
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* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
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* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*
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* ========================================================================
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*
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* Language: ANSI C
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* Environment: Any
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* Developer: Kendall Bennett
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*
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* Description: Header file for x86 register definitions.
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*
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****************************************************************************/
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#ifndef __X86EMU_REGS_H
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#define __X86EMU_REGS_H
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/*---------------------- Macros and type definitions ----------------------*/
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#pragma pack(1)
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/*
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* General EAX, EBX, ECX, EDX type registers. Note that for
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* portability, and speed, the issue of byte swapping is not addressed
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* in the registers. All registers are stored in the default format
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* available on the host machine. The only critical issue is that the
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* registers should line up EXACTLY in the same manner as they do in
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* the 386. That is:
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*
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* EAX & 0xff === AL
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* EAX & 0xffff == AX
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*
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* etc. The result is that alot of the calculations can then be
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* done using the native instruction set fully.
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*/
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#ifdef __BIG_ENDIAN__
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typedef struct {
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u32 e_reg;
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} I32_reg_t;
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typedef struct {
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u16 filler0, x_reg;
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} I16_reg_t;
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typedef struct {
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u8 filler0, filler1, h_reg, l_reg;
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} I8_reg_t;
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#else /* !__BIG_ENDIAN__ */
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typedef struct {
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u32 e_reg;
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} I32_reg_t;
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typedef struct {
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u16 x_reg;
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} I16_reg_t;
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typedef struct {
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u8 l_reg, h_reg;
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} I8_reg_t;
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#endif /* BIG_ENDIAN */
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typedef union {
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I32_reg_t I32_reg;
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I16_reg_t I16_reg;
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I8_reg_t I8_reg;
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} i386_general_register;
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struct i386_general_regs {
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i386_general_register A, B, C, D;
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};
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typedef struct i386_general_regs Gen_reg_t;
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struct i386_special_regs {
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i386_general_register SP, BP, SI, DI, IP;
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u32 FLAGS;
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};
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/*
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* Segment registers here represent the 16 bit quantities
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* CS, DS, ES, SS.
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*/
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#undef CS
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#undef DS
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#undef SS
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#undef ES
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#undef FS
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#undef GS
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struct i386_segment_regs {
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u16 CS, DS, SS, ES, FS, GS;
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};
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/* 8 bit registers */
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#define R_AH gen.A.I8_reg.h_reg
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#define R_AL gen.A.I8_reg.l_reg
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#define R_BH gen.B.I8_reg.h_reg
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#define R_BL gen.B.I8_reg.l_reg
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#define R_CH gen.C.I8_reg.h_reg
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#define R_CL gen.C.I8_reg.l_reg
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#define R_DH gen.D.I8_reg.h_reg
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#define R_DL gen.D.I8_reg.l_reg
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/* 16 bit registers */
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#define R_AX gen.A.I16_reg.x_reg
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#define R_BX gen.B.I16_reg.x_reg
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#define R_CX gen.C.I16_reg.x_reg
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#define R_DX gen.D.I16_reg.x_reg
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/* 32 bit extended registers */
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#define R_EAX gen.A.I32_reg.e_reg
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#define R_EBX gen.B.I32_reg.e_reg
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#define R_ECX gen.C.I32_reg.e_reg
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#define R_EDX gen.D.I32_reg.e_reg
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/* special registers */
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#define R_SP spc.SP.I16_reg.x_reg
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#define R_BP spc.BP.I16_reg.x_reg
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#define R_SI spc.SI.I16_reg.x_reg
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#define R_DI spc.DI.I16_reg.x_reg
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#define R_IP spc.IP.I16_reg.x_reg
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#define R_FLG spc.FLAGS
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/* special registers */
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#define R_SP spc.SP.I16_reg.x_reg
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#define R_BP spc.BP.I16_reg.x_reg
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#define R_SI spc.SI.I16_reg.x_reg
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#define R_DI spc.DI.I16_reg.x_reg
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#define R_IP spc.IP.I16_reg.x_reg
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#define R_FLG spc.FLAGS
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/* special registers */
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#define R_ESP spc.SP.I32_reg.e_reg
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#define R_EBP spc.BP.I32_reg.e_reg
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#define R_ESI spc.SI.I32_reg.e_reg
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#define R_EDI spc.DI.I32_reg.e_reg
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#define R_EIP spc.IP.I32_reg.e_reg
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#define R_EFLG spc.FLAGS
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/* segment registers */
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#define R_CS seg.CS
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#define R_DS seg.DS
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#define R_SS seg.SS
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#define R_ES seg.ES
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#define R_FS seg.FS
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#define R_GS seg.GS
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/* flag conditions */
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#define FB_CF 0x0001 /* CARRY flag */
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#define FB_PF 0x0004 /* PARITY flag */
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#define FB_AF 0x0010 /* AUX flag */
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#define FB_ZF 0x0040 /* ZERO flag */
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#define FB_SF 0x0080 /* SIGN flag */
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#define FB_TF 0x0100 /* TRAP flag */
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#define FB_IF 0x0200 /* INTERRUPT ENABLE flag */
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#define FB_DF 0x0400 /* DIR flag */
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#define FB_OF 0x0800 /* OVERFLOW flag */
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/* 80286 and above always have bit#1 set */
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#define F_ALWAYS_ON (0x0002) /* flag bits always on */
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/*
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* Define a mask for only those flag bits we will ever pass back
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* (via PUSHF)
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*/
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#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
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/* following bits masked in to a 16bit quantity */
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#define F_CF 0x0001 /* CARRY flag */
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#define F_PF 0x0004 /* PARITY flag */
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#define F_AF 0x0010 /* AUX flag */
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#define F_ZF 0x0040 /* ZERO flag */
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#define F_SF 0x0080 /* SIGN flag */
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#define F_TF 0x0100 /* TRAP flag */
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#define F_IF 0x0200 /* INTERRUPT ENABLE flag */
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#define F_DF 0x0400 /* DIR flag */
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#define F_OF 0x0800 /* OVERFLOW flag */
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#define TOGGLE_FLAG(flag) (M.x86.R_FLG ^= (flag))
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#define SET_FLAG(flag) (M.x86.R_FLG |= (flag))
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#define CLEAR_FLAG(flag) (M.x86.R_FLG &= ~(flag))
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#define ACCESS_FLAG(flag) (M.x86.R_FLG & (flag))
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#define CLEARALL_FLAG(m) (M.x86.R_FLG = 0)
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#define CONDITIONAL_SET_FLAG(COND,FLAG) \
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if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
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#define F_PF_CALC 0x010000 /* PARITY flag has been calced */
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#define F_ZF_CALC 0x020000 /* ZERO flag has been calced */
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#define F_SF_CALC 0x040000 /* SIGN flag has been calced */
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#define F_ALL_CALC 0xff0000 /* All have been calced */
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/*
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* Emulator machine state.
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* Segment usage control.
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*/
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#define SYSMODE_SEG_DS_SS 0x00000001
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#define SYSMODE_SEGOVR_CS 0x00000002
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#define SYSMODE_SEGOVR_DS 0x00000004
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#define SYSMODE_SEGOVR_ES 0x00000008
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#define SYSMODE_SEGOVR_FS 0x00000010
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#define SYSMODE_SEGOVR_GS 0x00000020
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#define SYSMODE_SEGOVR_SS 0x00000040
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#define SYSMODE_PREFIX_REPE 0x00000080
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#define SYSMODE_PREFIX_REPNE 0x00000100
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#define SYSMODE_PREFIX_DATA 0x00000200
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#define SYSMODE_PREFIX_ADDR 0x00000400
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#define SYSMODE_INTR_PENDING 0x10000000
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#define SYSMODE_EXTRN_INTR 0x20000000
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#define SYSMODE_HALTED 0x40000000
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#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \
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SYSMODE_SEGOVR_CS | \
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SYSMODE_SEGOVR_DS | \
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SYSMODE_SEGOVR_ES | \
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SYSMODE_SEGOVR_FS | \
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SYSMODE_SEGOVR_GS | \
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SYSMODE_SEGOVR_SS)
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#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \
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SYSMODE_SEGOVR_CS | \
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SYSMODE_SEGOVR_DS | \
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SYSMODE_SEGOVR_ES | \
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SYSMODE_SEGOVR_FS | \
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SYSMODE_SEGOVR_GS | \
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SYSMODE_SEGOVR_SS | \
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SYSMODE_PREFIX_DATA | \
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SYSMODE_PREFIX_ADDR)
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#define INTR_SYNCH 0x1
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#define INTR_ASYNCH 0x2
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#define INTR_HALTED 0x4
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typedef struct {
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struct i386_general_regs gen;
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struct i386_special_regs spc;
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struct i386_segment_regs seg;
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/*
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* MODE contains information on:
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* REPE prefix 2 bits repe,repne
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* SEGMENT overrides 5 bits normal,DS,SS,CS,ES
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* Delayed flag set 3 bits (zero, signed, parity)
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* reserved 6 bits
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* interrupt # 8 bits instruction raised interrupt
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* BIOS video segregs 4 bits
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* Interrupt Pending 1 bits
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* Extern interrupt 1 bits
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* Halted 1 bits
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*/
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long mode;
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u8 intno;
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volatile int intr; /* mask of pending interrupts */
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int debug;
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#ifdef CONFIG_X86EMU_DEBUG
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int check;
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u16 saved_ip;
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u16 saved_cs;
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int enc_pos;
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int enc_str_pos;
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char decode_buf[32]; /* encoded byte stream */
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char decoded_buf[256]; /* disassembled strings */
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#endif
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} X86EMU_regs;
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/****************************************************************************
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REMARKS:
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Structure maintaining the emulator machine state.
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MEMBERS:
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x86 - X86 registers
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mem_base - Base real mode memory for the emulator
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mem_size - Size of the real mode memory block for the emulator
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****************************************************************************/
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#undef x86
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typedef struct {
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X86EMU_regs x86;
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u8 *mem_base;
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u32 mem_size;
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void *private;
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} X86EMU_sysEnv;
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#pragma pack()
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/*----------------------------- Global Variables --------------------------*/
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#ifdef __cplusplus
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extern "C" { /* Use "C" linkage when in C++ mode */
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#endif
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/* Global emulator machine state.
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*
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* We keep it global to avoid pointer dereferences in the code for speed.
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*/
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extern X86EMU_sysEnv _X86EMU_env;
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#define M _X86EMU_env
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/*-------------------------- Function Prototypes --------------------------*/
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/* Function to log information at runtime */
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#ifndef __KERNEL__
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void printk(const char *fmt, ...);
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#endif
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#ifdef __cplusplus
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} /* End of "C" linkage for C++ */
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#endif
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#endif /* __X86EMU_REGS_H */
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