/*
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* Copyright 2015 Microchip Technology, Inc.
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* Purna Chandra Mandal, <purna.mandal@microchip.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/clock/microchip,clock.h>
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#include <dt-bindings/gpio/gpio.h>
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#include "skeleton.dtsi"
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/ {
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compatible = "microchip,pic32mzda", "microchip,pic32mz";
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aliases {
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gpio0 = &gpioA;
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gpio1 = &gpioB;
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gpio2 = &gpioC;
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gpio3 = &gpioD;
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gpio4 = &gpioE;
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gpio5 = &gpioF;
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gpio6 = &gpioG;
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gpio7 = &gpioH;
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gpio8 = &gpioJ;
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gpio9 = &gpioK;
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};
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cpus {
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cpu@0 {
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compatible = "mips,mips14kc";
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};
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};
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clock: clk@1f801200 {
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compatible = "microchip,pic32mzda-clk";
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reg = <0x1f801200 0x1000>;
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#clock-cells = <1>;
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};
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uart1: serial@1f822000 {
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compatible = "microchip,pic32mzda-uart";
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reg = <0x1f822000 0x50>;
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interrupts = <112 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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clocks = <&clock PB2CLK>;
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};
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uart2: serial@1f822200 {
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compatible = "microchip,pic32mzda-uart";
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reg = <0x1f822200 0x50>;
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interrupts = <145 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clock PB2CLK>;
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status = "disabled";
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};
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uart6: serial@1f822a00 {
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compatible = "microchip,pic32mzda-uart";
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reg = <0x1f822a00 0x50>;
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interrupts = <188 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clock PB2CLK>;
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status = "disabled";
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};
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evic: interrupt-controller@1f810000 {
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compatible = "microchip,pic32mzda-evic";
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x1f810000 0x1000>;
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};
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pinctrl: pinctrl@1f801400 {
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compatible = "microchip,pic32mzda-pinctrl";
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reg = <0x1f801400 0x100>, /* in */
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<0x1f801500 0x200>, /* out */
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<0x1f860000 0xa00>; /* port */
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reg-names = "ppsin","ppsout","port";
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status = "disabled";
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ranges = <0 0x1f860000 0xa00>;
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#address-cells = <1>;
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#size-cells = <1>;
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gpioA: gpio0@0 {
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compatible = "microchip,pic32mzda-gpio";
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reg = <0x000 0x48>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioB: gpio1@100 {
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compatible = "microchip,pic32mzda-gpio";
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reg = <0x100 0x48>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioC: gpio2@200 {
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compatible = "microchip,pic32mzda-gpio";
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reg = <0x200 0x48>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioD: gpio3@300 {
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compatible = "microchip,pic32mzda-gpio";
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reg = <0x300 0x48>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioE: gpio4@400 {
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compatible = "microchip,pic32mzda-gpio";
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reg = <0x400 0x48>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioF: gpio5@500 {
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compatible = "microchip,pic32mzda-gpio";
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reg = <0x500 0x48>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioG: gpio6@600 {
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compatible = "microchip,pic32mzda-gpio";
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reg = <0x600 0x48>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioH: gpio7@700 {
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compatible = "microchip,pic32mzda-gpio";
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reg = <0x700 0x48>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioJ: gpio8@800 {
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compatible = "microchip,pic32mzda-gpio";
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reg = <0x800 0x48>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioK: gpio9@900 {
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compatible = "microchip,pic32mzda-gpio";
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reg = <0x900 0x48>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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sdhci: sdhci@1f8ec000 {
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compatible = "microchip,pic32mzda-sdhci";
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reg = <0x1f8ec000 0x100>;
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interrupts = <191 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clock REF4CLK>, <&clock PB5CLK>;
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clock-names = "base_clk", "sys_clk";
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clock-freq-min-max = <25000000>,<25000000>;
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bus-width = <4>;
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status = "disabled";
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};
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ethernet: ethernet@1f882000 {
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compatible = "microchip,pic32mzda-eth";
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reg = <0x1f882000 0x1000>;
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interrupts = <153 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clock PB5CLK>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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usb: musb@1f8e3000 {
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compatible = "microchip,pic32mzda-usb";
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reg = <0x1f8e3000 0x1000>,
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<0x1f884000 0x1000>;
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reg-names = "mc", "control";
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interrupts = <132 IRQ_TYPE_EDGE_RISING>,
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<133 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clock PB5CLK>;
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clock-names = "usb_clk";
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status = "disabled";
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};
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};
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