// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2016, Linaro Ltd
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*/
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/mfd/syscon.h>
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#include <linux/slab.h>
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#include <linux/rpmsg.h>
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#include <linux/idr.h>
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#include <linux/circ_buf.h>
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#include <linux/soc/qcom/smem.h>
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#include <linux/sizes.h>
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#include <linux/delay.h>
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#include <linux/regmap.h>
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#include <linux/workqueue.h>
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#include <linux/list.h>
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#include <linux/rpmsg/qcom_glink.h>
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#include "qcom_glink_native.h"
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#define FIFO_FULL_RESERVE 8
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#define FIFO_ALIGNMENT 8
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#define TX_BLOCKED_CMD_RESERVE 8 /* size of struct read_notif_request */
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#define SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR 478
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#define SMEM_GLINK_NATIVE_XPRT_FIFO_0 479
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#define SMEM_GLINK_NATIVE_XPRT_FIFO_1 480
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struct glink_smem_pipe {
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struct qcom_glink_pipe native;
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__le32 *tail;
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__le32 *head;
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void *fifo;
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int remote_pid;
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};
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#define to_smem_pipe(p) container_of(p, struct glink_smem_pipe, native)
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static size_t glink_smem_rx_avail(struct qcom_glink_pipe *np)
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{
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struct glink_smem_pipe *pipe = to_smem_pipe(np);
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size_t len;
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void *fifo;
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u32 head;
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u32 tail;
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if (!pipe->fifo) {
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fifo = qcom_smem_get(pipe->remote_pid,
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SMEM_GLINK_NATIVE_XPRT_FIFO_1, &len);
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if (IS_ERR(fifo)) {
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pr_err("failed to acquire RX fifo handle: %ld\n",
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PTR_ERR(fifo));
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return 0;
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}
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pipe->fifo = fifo;
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pipe->native.length = len;
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}
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head = le32_to_cpu(*pipe->head);
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tail = le32_to_cpu(*pipe->tail);
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if (head < tail)
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return pipe->native.length - tail + head;
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else
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return head - tail;
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}
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static void glink_smem_rx_peak(struct qcom_glink_pipe *np,
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void *data, unsigned int offset, size_t count)
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{
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struct glink_smem_pipe *pipe = to_smem_pipe(np);
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size_t len;
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u32 tail;
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tail = le32_to_cpu(*pipe->tail);
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tail += offset;
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if (tail >= pipe->native.length)
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tail -= pipe->native.length;
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len = min_t(size_t, count, pipe->native.length - tail);
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if (len)
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memcpy_fromio(data, pipe->fifo + tail, len);
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if (len != count)
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memcpy_fromio(data + len, pipe->fifo, (count - len));
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}
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static void glink_smem_rx_advance(struct qcom_glink_pipe *np,
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size_t count)
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{
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struct glink_smem_pipe *pipe = to_smem_pipe(np);
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u32 tail;
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tail = le32_to_cpu(*pipe->tail);
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tail += count;
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if (tail >= pipe->native.length)
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tail -= pipe->native.length;
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*pipe->tail = cpu_to_le32(tail);
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}
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static size_t glink_smem_tx_avail(struct qcom_glink_pipe *np)
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{
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struct glink_smem_pipe *pipe = to_smem_pipe(np);
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u32 head;
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u32 tail;
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u32 avail;
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head = le32_to_cpu(*pipe->head);
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tail = le32_to_cpu(*pipe->tail);
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if (tail <= head)
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avail = pipe->native.length - head + tail;
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else
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avail = tail - head;
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if (avail < (FIFO_FULL_RESERVE + TX_BLOCKED_CMD_RESERVE))
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avail = 0;
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else
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avail -= FIFO_FULL_RESERVE + TX_BLOCKED_CMD_RESERVE;
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return avail;
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}
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static unsigned int glink_smem_tx_write_one(struct glink_smem_pipe *pipe,
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unsigned int head,
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const void *data, size_t count)
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{
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size_t len;
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len = min_t(size_t, count, pipe->native.length - head);
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if (len)
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memcpy(pipe->fifo + head, data, len);
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if (len != count)
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memcpy(pipe->fifo, data + len, count - len);
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head += count;
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if (head >= pipe->native.length)
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head -= pipe->native.length;
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return head;
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}
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static void glink_smem_tx_write(struct qcom_glink_pipe *glink_pipe,
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const void *hdr, size_t hlen,
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const void *data, size_t dlen)
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{
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struct glink_smem_pipe *pipe = to_smem_pipe(glink_pipe);
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unsigned int head;
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head = le32_to_cpu(*pipe->head);
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head = glink_smem_tx_write_one(pipe, head, hdr, hlen);
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head = glink_smem_tx_write_one(pipe, head, data, dlen);
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/* Ensure head is always aligned to 8 bytes */
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head = ALIGN(head, 8);
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if (head >= pipe->native.length)
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head -= pipe->native.length;
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/* Ensure ordering of fifo and head update */
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wmb();
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*pipe->head = cpu_to_le32(head);
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}
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static void qcom_glink_smem_release(struct device *dev)
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{
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kfree(dev);
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}
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struct qcom_glink *qcom_glink_smem_register(struct device *parent,
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struct device_node *node)
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{
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struct glink_smem_pipe *rx_pipe;
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struct glink_smem_pipe *tx_pipe;
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struct qcom_glink *glink;
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struct device *dev;
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u32 remote_pid;
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__le32 *descs;
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size_t size;
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int ret;
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dev = kzalloc(sizeof(*dev), GFP_KERNEL);
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if (!dev)
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return ERR_PTR(-ENOMEM);
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dev->parent = parent;
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dev->of_node = node;
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dev->release = qcom_glink_smem_release;
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dev_set_name(dev, "%s:%pOFn", dev_name(parent->parent), node);
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ret = device_register(dev);
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if (ret) {
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pr_err("failed to register glink edge\n");
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put_device(dev);
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return ERR_PTR(ret);
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}
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ret = of_property_read_u32(dev->of_node, "qcom,remote-pid",
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&remote_pid);
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if (ret) {
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dev_err(dev, "failed to parse qcom,remote-pid\n");
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goto err_put_dev;
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}
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rx_pipe = devm_kzalloc(dev, sizeof(*rx_pipe), GFP_KERNEL);
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tx_pipe = devm_kzalloc(dev, sizeof(*tx_pipe), GFP_KERNEL);
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if (!rx_pipe || !tx_pipe) {
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ret = -ENOMEM;
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goto err_put_dev;
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}
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ret = qcom_smem_alloc(remote_pid,
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SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR, 32);
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if (ret && ret != -EEXIST) {
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dev_err(dev, "failed to allocate glink descriptors\n");
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goto err_put_dev;
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}
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descs = qcom_smem_get(remote_pid,
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SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR, &size);
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if (IS_ERR(descs)) {
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dev_err(dev, "failed to acquire xprt descriptor\n");
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ret = PTR_ERR(descs);
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goto err_put_dev;
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}
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if (size != 32) {
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dev_err(dev, "glink descriptor of invalid size\n");
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ret = -EINVAL;
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goto err_put_dev;
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}
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tx_pipe->tail = &descs[0];
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tx_pipe->head = &descs[1];
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rx_pipe->tail = &descs[2];
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rx_pipe->head = &descs[3];
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ret = qcom_smem_alloc(remote_pid, SMEM_GLINK_NATIVE_XPRT_FIFO_0,
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SZ_16K);
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if (ret && ret != -EEXIST) {
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dev_err(dev, "failed to allocate TX fifo\n");
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goto err_put_dev;
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}
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tx_pipe->fifo = qcom_smem_get(remote_pid, SMEM_GLINK_NATIVE_XPRT_FIFO_0,
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&tx_pipe->native.length);
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if (IS_ERR(tx_pipe->fifo)) {
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dev_err(dev, "failed to acquire TX fifo\n");
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ret = PTR_ERR(tx_pipe->fifo);
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goto err_put_dev;
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}
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rx_pipe->native.avail = glink_smem_rx_avail;
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rx_pipe->native.peak = glink_smem_rx_peak;
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rx_pipe->native.advance = glink_smem_rx_advance;
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rx_pipe->remote_pid = remote_pid;
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tx_pipe->native.avail = glink_smem_tx_avail;
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tx_pipe->native.write = glink_smem_tx_write;
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tx_pipe->remote_pid = remote_pid;
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*rx_pipe->tail = 0;
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*tx_pipe->head = 0;
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glink = qcom_glink_native_probe(dev,
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GLINK_FEATURE_INTENT_REUSE,
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&rx_pipe->native, &tx_pipe->native,
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false);
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if (IS_ERR(glink)) {
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ret = PTR_ERR(glink);
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goto err_put_dev;
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}
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return glink;
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err_put_dev:
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device_unregister(dev);
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return ERR_PTR(ret);
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}
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EXPORT_SYMBOL_GPL(qcom_glink_smem_register);
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void qcom_glink_smem_unregister(struct qcom_glink *glink)
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{
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qcom_glink_native_remove(glink);
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qcom_glink_native_unregister(glink);
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}
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EXPORT_SYMBOL_GPL(qcom_glink_smem_unregister);
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MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@linaro.org>");
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MODULE_DESCRIPTION("Qualcomm GLINK SMEM driver");
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MODULE_LICENSE("GPL v2");
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