/*
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* Combined Ethernet driver for Motorola MPC8xx and MPC82xx.
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*
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* Copyright (c) 2003 Intracom S.A.
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* by Pantelis Antoniou <panto@intracom.gr>
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*
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* 2005 (c) MontaVista Software, Inc.
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* Vitaly Bordug <vbordug@ru.mvista.com>
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/ptrace.h>
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#include <linux/errno.h>
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#include <linux/ioport.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/skbuff.h>
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#include <linux/spinlock.h>
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#include <linux/mii.h>
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#include <linux/ethtool.h>
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#include <linux/bitops.h>
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#include <linux/platform_device.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/pgtable.h>
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#include <asm/irq.h>
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#include <linux/uaccess.h>
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#include <asm/mpc5xxx.h>
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#include "fs_enet.h"
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#include "fec.h"
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/* Make MII read/write commands for the FEC.
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*/
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#define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18))
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#define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff))
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#define mk_mii_end 0
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#define FEC_MII_LOOPS 10000
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static int fs_enet_fec_mii_read(struct mii_bus *bus , int phy_id, int location)
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{
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struct fec_info* fec = bus->priv;
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struct fec __iomem *fecp = fec->fecp;
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int i, ret = -1;
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BUG_ON((in_be32(&fecp->fec_r_cntrl) & FEC_RCNTRL_MII_MODE) == 0);
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/* Add PHY address to register command. */
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out_be32(&fecp->fec_mii_data, (phy_id << 23) | mk_mii_read(location));
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for (i = 0; i < FEC_MII_LOOPS; i++)
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if ((in_be32(&fecp->fec_ievent) & FEC_ENET_MII) != 0)
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break;
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if (i < FEC_MII_LOOPS) {
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out_be32(&fecp->fec_ievent, FEC_ENET_MII);
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ret = in_be32(&fecp->fec_mii_data) & 0xffff;
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}
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return ret;
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}
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static int fs_enet_fec_mii_write(struct mii_bus *bus, int phy_id, int location, u16 val)
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{
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struct fec_info* fec = bus->priv;
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struct fec __iomem *fecp = fec->fecp;
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int i;
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/* this must never happen */
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BUG_ON((in_be32(&fecp->fec_r_cntrl) & FEC_RCNTRL_MII_MODE) == 0);
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/* Add PHY address to register command. */
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out_be32(&fecp->fec_mii_data, (phy_id << 23) | mk_mii_write(location, val));
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for (i = 0; i < FEC_MII_LOOPS; i++)
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if ((in_be32(&fecp->fec_ievent) & FEC_ENET_MII) != 0)
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break;
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if (i < FEC_MII_LOOPS)
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out_be32(&fecp->fec_ievent, FEC_ENET_MII);
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return 0;
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}
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static const struct of_device_id fs_enet_mdio_fec_match[];
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static int fs_enet_mdio_probe(struct platform_device *ofdev)
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{
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const struct of_device_id *match;
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struct resource res;
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struct mii_bus *new_bus;
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struct fec_info *fec;
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int (*get_bus_freq)(struct device_node *);
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int ret = -ENOMEM, clock, speed;
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match = of_match_device(fs_enet_mdio_fec_match, &ofdev->dev);
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if (!match)
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return -EINVAL;
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get_bus_freq = match->data;
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new_bus = mdiobus_alloc();
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if (!new_bus)
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goto out;
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fec = kzalloc(sizeof(struct fec_info), GFP_KERNEL);
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if (!fec)
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goto out_mii;
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new_bus->priv = fec;
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new_bus->name = "FEC MII Bus";
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new_bus->read = &fs_enet_fec_mii_read;
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new_bus->write = &fs_enet_fec_mii_write;
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ret = of_address_to_resource(ofdev->dev.of_node, 0, &res);
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if (ret)
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goto out_res;
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snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", res.start);
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fec->fecp = ioremap(res.start, resource_size(&res));
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if (!fec->fecp) {
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ret = -ENOMEM;
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goto out_fec;
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}
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if (get_bus_freq) {
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clock = get_bus_freq(ofdev->dev.of_node);
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if (!clock) {
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/* Use maximum divider if clock is unknown */
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dev_warn(&ofdev->dev, "could not determine IPS clock\n");
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clock = 0x3F * 5000000;
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}
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} else
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clock = ppc_proc_freq;
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/*
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* Scale for a MII clock <= 2.5 MHz
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* Note that only 6 bits (25:30) are available for MII speed.
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*/
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speed = (clock + 4999999) / 5000000;
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if (speed > 0x3F) {
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speed = 0x3F;
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dev_err(&ofdev->dev,
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"MII clock (%d Hz) exceeds max (2.5 MHz)\n",
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clock / speed);
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}
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fec->mii_speed = speed << 1;
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setbits32(&fec->fecp->fec_r_cntrl, FEC_RCNTRL_MII_MODE);
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setbits32(&fec->fecp->fec_ecntrl, FEC_ECNTRL_PINMUX |
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FEC_ECNTRL_ETHER_EN);
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out_be32(&fec->fecp->fec_ievent, FEC_ENET_MII);
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clrsetbits_be32(&fec->fecp->fec_mii_speed, 0x7E, fec->mii_speed);
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new_bus->phy_mask = ~0;
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new_bus->parent = &ofdev->dev;
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platform_set_drvdata(ofdev, new_bus);
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ret = of_mdiobus_register(new_bus, ofdev->dev.of_node);
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if (ret)
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goto out_unmap_regs;
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return 0;
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out_unmap_regs:
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iounmap(fec->fecp);
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out_res:
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out_fec:
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kfree(fec);
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out_mii:
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mdiobus_free(new_bus);
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out:
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return ret;
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}
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static int fs_enet_mdio_remove(struct platform_device *ofdev)
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{
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struct mii_bus *bus = platform_get_drvdata(ofdev);
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struct fec_info *fec = bus->priv;
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mdiobus_unregister(bus);
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iounmap(fec->fecp);
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kfree(fec);
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mdiobus_free(bus);
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return 0;
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}
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static const struct of_device_id fs_enet_mdio_fec_match[] = {
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{
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.compatible = "fsl,pq1-fec-mdio",
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},
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#if defined(CONFIG_PPC_MPC512x)
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{
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.compatible = "fsl,mpc5121-fec-mdio",
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.data = mpc5xxx_get_bus_frequency,
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},
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#endif
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{},
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};
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MODULE_DEVICE_TABLE(of, fs_enet_mdio_fec_match);
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static struct platform_driver fs_enet_fec_mdio_driver = {
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.driver = {
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.name = "fsl-fec-mdio",
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.of_match_table = fs_enet_mdio_fec_match,
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},
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.probe = fs_enet_mdio_probe,
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.remove = fs_enet_mdio_remove,
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};
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module_platform_driver(fs_enet_fec_mdio_driver);
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MODULE_LICENSE("GPL");
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