/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* arch/arm/mach-s3c2410/include/mach/io.h
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* from arch/arm/mach-rpc/include/mach/io.h
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*
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* Copyright (C) 1997 Russell King
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* (C) 2003 Simtec Electronics
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*/
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#ifndef __ASM_ARM_ARCH_IO_S3C24XX_H
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#define __ASM_ARM_ARCH_IO_S3C24XX_H
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#include <mach/map-base.h>
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/*
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* ISA style IO, for each machine to sort out mappings for,
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* if it implements it. We reserve two 16M regions for ISA,
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* so the PC/104 can use separate addresses for 8-bit and
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* 16-bit port I/O.
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*/
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#define PCIO_BASE S3C_ADDR(0x02000000)
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#define IO_SPACE_LIMIT 0x00ffffff
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#define S3C24XX_VA_ISA_WORD (PCIO_BASE)
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#define S3C24XX_VA_ISA_BYTE (PCIO_BASE + 0x01000000)
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#ifdef CONFIG_ISA
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#define inb(p) readb(S3C24XX_VA_ISA_BYTE + (p))
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#define inw(p) readw(S3C24XX_VA_ISA_WORD + (p))
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#define inl(p) readl(S3C24XX_VA_ISA_WORD + (p))
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#define outb(v,p) writeb((v), S3C24XX_VA_ISA_BYTE + (p))
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#define outw(v,p) writew((v), S3C24XX_VA_ISA_WORD + (p))
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#define outl(v,p) writel((v), S3C24XX_VA_ISA_WORD + (p))
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#define insb(p,d,l) readsb(S3C24XX_VA_ISA_BYTE + (p),d,l)
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#define insw(p,d,l) readsw(S3C24XX_VA_ISA_WORD + (p),d,l)
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#define insl(p,d,l) readsl(S3C24XX_VA_ISA_WORD + (p),d,l)
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#define outsb(p,d,l) writesb(S3C24XX_VA_ISA_BYTE + (p),d,l)
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#define outsw(p,d,l) writesw(S3C24XX_VA_ISA_WORD + (p),d,l)
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#define outsl(p,d,l) writesl(S3C24XX_VA_ISA_WORD + (p),d,l)
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#else
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#define __io(x) (PCIO_BASE + (x))
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#endif
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#endif
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