// SPDX-License-Identifier: GPL-2.0+ OR MIT
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//
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// Copyright 2015 Armadeus Systems <support@armadeus.com>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "1P8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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vin-supply = <®_3p3v>;
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};
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usdhc1_pwrseq: usdhc1-pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
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post-power-on-delay-ms = <15>;
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power-off-delay-us = <70>;
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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phy-mode = "rgmii-id";
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phy-reset-duration = <10>;
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phy-reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
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phy-handle = <ðphy1>;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy1: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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interrupt-parent = <&gpio1>;
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interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
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status = "okay";
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};
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};
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};
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/* Bluetooth */
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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uart-has-rtscts;
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status = "okay";
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};
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/* Wi-Fi */
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&usdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc1>;
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bus-width = <4>;
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mmc-pwrseq = <&usdhc1_pwrseq>;
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_1p8v>;
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cap-power-off-card;
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keep-power-in-suspend;
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non-removable;
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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wlcore: wlcore@2 {
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compatible = "ti,wl1271";
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reg = <2>;
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interrupt-parent = <&gpio2>;
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interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
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ref-clock-frequency = <38400000>;
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tcxo-clock-frequency = <38400000>;
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};
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};
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/* eMMC */
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&usdhc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3>;
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bus-width = <8>;
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no-1-8-v;
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non-removable;
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status = "okay";
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};
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&iomuxc {
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pinctrl_enet: enetgrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b8b0
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
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MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
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MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x130b0
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MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x130b0
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MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
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MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
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MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
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MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
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MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
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MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
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MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x13030
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MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
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MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030
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MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1f030
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MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1f030
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MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x13030
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b0
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MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b0
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MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b0
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MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b0
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MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x130b0 /* BT_EN */
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>;
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};
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pinctrl_usdhc1: usdhc1grp {
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fsl,pins = <
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MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
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MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
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MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
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MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
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MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
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MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
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MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x130b0 /* WL_EN */
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MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x130b0 /* WL_IRQ */
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
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MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
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MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
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MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
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MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
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MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
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MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
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MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
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MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
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MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
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>;
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};
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};
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