// SPDX-License-Identifier: GPL-2.0
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/*
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* support for the bosch am335x based shc c3 board
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*
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* Copyright, C) 2015 Heiko Schocher <hs@denx.de>
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*
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*/
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/dts-v1/;
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#include "am33xx.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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model = "Bosch SHC";
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compatible = "ti,am335x-shc", "ti,am335x-bone", "ti,am33xx";
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aliases {
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mmcblk0 = &mmc1;
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mmcblk1 = &mmc2;
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};
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cpus {
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cpu@0 {
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/*
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* To consider voltage drop between PMIC and SoC,
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* tolerance value is reduced to 2% from 4% and
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* voltage value is increased as a precaution.
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*/
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operating-points = <
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/* kHz uV */
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594000 1225000
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294000 1125000
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>;
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voltage-tolerance = <2>; /* 2 percentage */
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cpu0-supply = <&dcdc2_reg>;
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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back_button {
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label = "Back Button";
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gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
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linux,code = <KEY_BACK>;
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debounce-interval = <1000>;
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wakeup-source;
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};
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front_button {
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label = "Front Button";
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gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
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linux,code = <KEY_FRONT>;
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debounce-interval = <1000>;
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wakeup-source;
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};
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};
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leds {
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pinctrl-names = "default";
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pinctrl-0 = <&user_leds_s0>;
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compatible = "gpio-leds";
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led1 {
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label = "shc:power:red";
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gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led2 {
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label = "shc:power:bl";
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gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "timer";
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default-state = "on";
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};
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led3 {
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label = "shc:lan:red";
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gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led4 {
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label = "shc:lan:bl";
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gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led5 {
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label = "shc:cloud:red";
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gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led6 {
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label = "shc:cloud:bl";
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gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x20000000>; /* 512 MB */
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};
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vmmcsd_fixed: fixedregulator0 {
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compatible = "regulator-fixed";
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regulator-name = "vmmcsd_fixed";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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&aes {
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status = "okay";
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};
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&davinci_mdio {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&davinci_mdio_default>;
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pinctrl-1 = <&davinci_mdio_sleep>;
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status = "okay";
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ethernetphy0: ethernet-phy@0 {
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reg = <0>;
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smsc,disable-energy-detect;
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};
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};
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&epwmss1 {
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status = "okay";
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ehrpwm1: pwm@200 {
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pinctrl-names = "default";
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pinctrl-0 = <&ehrpwm1_pins>;
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status = "okay";
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};
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};
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&gpio1 {
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hmtc_rst {
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gpio-hog;
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gpios = <24 GPIO_ACTIVE_LOW>;
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output-high;
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line-name = "homematic_reset";
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};
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hmtc_prog {
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gpio-hog;
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gpios = <27 GPIO_ACTIVE_LOW>;
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output-high;
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line-name = "homematic_program";
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};
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};
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&gpio3 {
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zgb_rst {
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gpio-hog;
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gpios = <18 GPIO_ACTIVE_LOW>;
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output-low;
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line-name = "zigbee_reset";
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};
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zgb_boot {
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gpio-hog;
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gpios = <19 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "zigbee_boot";
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};
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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status = "okay";
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clock-frequency = <400000>;
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tps: tps@24 {
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reg = <0x24>;
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};
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at24@50 {
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compatible = "atmel,24c32";
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pagesize = <32>;
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reg = <0x50>;
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};
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pcf8563@51 {
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compatible = "nxp,pcf8563";
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reg = <0x51>;
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};
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};
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&mac {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&cpsw_default>;
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pinctrl-1 = <&cpsw_sleep>;
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status = "okay";
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slaves = <1>;
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cpsw_emac0: slave@200 {
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phy-mode = "mii";
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phy-handle = <ðernetphy0>;
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};
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};
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&mmc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins>;
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bus-width = <0x4>;
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cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
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cd-inverted;
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max-frequency = <26000000>;
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vmmc-supply = <&vmmcsd_fixed>;
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status = "okay";
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};
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&mmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&emmc_pins>;
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bus-width = <8>;
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max-frequency = <26000000>;
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sd-uhs-sdr25;
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vmmc-supply = <&vmmcsd_fixed>;
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status = "okay";
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};
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&mmc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc3_pins>;
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bus-width = <4>;
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cap-power-off-card;
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max-frequency = <26000000>;
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sd-uhs-sdr25;
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vmmc-supply = <&vmmcsd_fixed>;
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status = "okay";
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};
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&rtc {
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ti,no-init;
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};
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&sham {
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status = "okay";
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};
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&tps {
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compatible = "ti,tps65217";
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ti,pmic-shutdown-controller;
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regulators {
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#address-cells = <1>;
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#size-cells = <0>;
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dcdc1_reg: regulator@0 {
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reg = <0>;
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regulator-name = "vdds_dpr";
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regulator-compatible = "dcdc1";
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regulator-min-microvolt = <1300000>;
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regulator-max-microvolt = <1450000>;
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regulator-boot-on;
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regulator-always-on;
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};
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dcdc2_reg: regulator@1 {
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reg = <1>;
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/*
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* VDD_MPU voltage limits 0.95V - 1.26V with
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* +/-4% tolerance
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*/
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regulator-compatible = "dcdc2";
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regulator-name = "vdd_mpu";
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regulator-min-microvolt = <925000>;
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regulator-max-microvolt = <1375000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <70000>;
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};
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dcdc3_reg: regulator@2 {
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reg = <2>;
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/*
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* VDD_CORE voltage limits 0.95V - 1.1V with
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* +/-4% tolerance
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*/
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regulator-name = "vdd_core";
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regulator-compatible = "dcdc3";
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regulator-min-microvolt = <925000>;
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regulator-max-microvolt = <1125000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo1_reg: regulator@3 {
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reg = <3>;
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regulator-name = "vio,vrtc,vdds";
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regulator-compatible = "ldo1";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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ldo2_reg: regulator@4 {
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reg = <4>;
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regulator-name = "vdd_3v3aux";
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regulator-compatible = "ldo2";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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ldo3_reg: regulator@5 {
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reg = <5>;
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regulator-name = "vdd_1v8";
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regulator-compatible = "ldo3";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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ldo4_reg: regulator@6 {
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reg = <6>;
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regulator-name = "vdd_3v3a";
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regulator-compatible = "ldo4";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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status = "okay";
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};
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&uart4 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart4_pins>;
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status = "okay";
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};
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&usb1 {
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dr_mode = "host";
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};
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&am33xx_pinmux {
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pinctrl-names = "default";
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pinctrl-0 = <&clkout2_pin>;
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clkout2_pin: pinmux_clkout2_pin {
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pinctrl-single,pins = <
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/* xdma_event_intr1.clkout2 */
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AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_INPUT, MUX_MODE6)
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>;
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};
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cpsw_default: cpsw_default {
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pinctrl-single,pins = <
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/* Slave 1 */
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE0)
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>;
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};
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cpsw_sleep: cpsw_sleep {
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pinctrl-single,pins = <
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/* Slave 1 reset value */
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
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>;
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};
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davinci_mdio_default: davinci_mdio_default {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
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>;
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};
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davinci_mdio_sleep: davinci_mdio_sleep {
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pinctrl-single,pins = <
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/* MDIO reset value */
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AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
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>;
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};
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ehrpwm1_pins: pinmux_ehrpwm1 {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT, MUX_MODE6) /* gpmc_a3.gpio1_19 */
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>;
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};
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emmc_pins: pinmux_emmc_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT, MUX_MODE2)
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AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1)
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>;
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};
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i2c0_pins: pinmux_i2c0_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT, MUX_MODE0)
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>;
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};
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mmc1_pins: pinmux_mmc1_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE5)
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>;
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};
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mmc3_pins: pinmux_mmc3_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT, MUX_MODE3)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT, MUX_MODE3)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT, MUX_MODE3)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT, MUX_MODE3)
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AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_INPUT, MUX_MODE3)
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AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT, MUX_MODE3)
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>;
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};
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uart0_pins: pinmux_uart0_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT, MUX_MODE0)
|
>;
|
};
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uart1_pins: pinmux_uart1 {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT, MUX_MODE0)
|
>;
|
};
|
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uart2_pins: pinmux_uart2_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE1)
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AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE1)
|
>;
|
};
|
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uart4_pins: pinmux_uart4_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6)
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AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLUP, MUX_MODE6)
|
>;
|
};
|
|
user_leds_s0: user_leds_s0 {
|
pinctrl-single,pins = <
|
AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_OUTPUT, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_OUTPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_OUTPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLUP, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_OUTPUT_PULLUP, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_INPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_INPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE7)
|
AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_OUTPUT, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_OUTPUT, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_OUTPUT_PULLUP, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MCASP0_FSR, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR1, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE7)
|
>;
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};
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};
|
