/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _HALMAC_TX_BD_CHIP_H_
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#define _HALMAC_TX_BD_CHIP_H_
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#if (HALMAC_8814A_SUPPORT)
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/*TXBD_DW0*/
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#define SET_TX_BD_OWN_8814A(__pTxBd, __Value) SET_TX_BD_OWN(__pTxBd, __Value)
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#define GET_TX_BD_OWN_8814A(__pTxBd) GET_TX_BD_OWN(__pTxBd)
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#define SET_TX_BD_PSB_8814A(__pTxBd, __Value) SET_TX_BD_PSB(__pTxBd, __Value)
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#define GET_TX_BD_PSB_8814A(__pTxBd) GET_TX_BD_PSB(__pTxBd)
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#define SET_TX_BD_TX_BUFF_SIZE0_8814A(__pTxBd, __Value) SET_TX_BD_TX_BUFF_SIZE0(__pTxBd, __Value)
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#define GET_TX_BD_TX_BUFF_SIZE0_8814A(__pTxBd) GET_TX_BD_TX_BUFF_SIZE0(__pTxBd)
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/*TXBD_DW1*/
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#define SET_TX_BD_PHYSICAL_ADDR0_LOW_8814A(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR0_LOW(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR0_LOW_8814A(__pTxBd) GET_TX_BD_PHYSICAL_ADDR0_LOW(__pTxBd)
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/*TXBD_DW2*/
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#define SET_TX_BD_PHYSICAL_ADDR0_HIGH_8814A(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR0_HIGH(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR0_HIGH_8814A(__pTxBd) GET_TX_BD_PHYSICAL_ADDR0_HIGH(__pTxBd)
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/*TXBD_DW4*/
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#define SET_TX_BD_A1_8814A(__pTxBd, __Value) SET_TX_BD_A1(__pTxBd, __Value)
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#define GET_TX_BD_A1_8814A(__pTxBd) GET_TX_BD_A1(__pTxBd)
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#define SET_TX_BD_TX_BUFF_SIZE1_8814A(__pTxBd, __Value) SET_TX_BD_TX_BUFF_SIZE1(__pTxBd, __Value)
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#define GET_TX_BD_TX_BUFF_SIZE1_8814A(__pTxBd) GET_TX_BD_TX_BUFF_SIZE1(__pTxBd)
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/*TXBD_DW5*/
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#define SET_TX_BD_PHYSICAL_ADDR1_LOW_8814A(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR1_LOW(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR1_LOW_8814A(__pTxBd) GET_TX_BD_PHYSICAL_ADDR1_LOW(__pTxBd)
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/*TXBD_DW6*/
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#define SET_TX_BD_PHYSICAL_ADDR1_HIGH_8814A(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR1_HIGH(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR1_HIGH_8814A(__pTxBd) GET_TX_BD_PHYSICAL_ADDR1_HIGH(__pTxBd)
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/*TXBD_DW8*/
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#define SET_TX_BD_A2_8814A(__pTxBd, __Value) SET_TX_BD_A2(__pTxBd, __Value)
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#define GET_TX_BD_A2_8814A(__pTxBd) GET_TX_BD_A2(__pTxBd)
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#define SET_TX_BD_TX_BUFF_SIZE2_8814A(__pTxBd, __Value) SET_TX_BD_TX_BUFF_SIZE2(__pTxBd, __Value)
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#define GET_TX_BD_TX_BUFF_SIZE2_8814A(__pTxBd) GET_TX_BD_TX_BUFF_SIZE2(__pTxBd)
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/*TXBD_DW9*/
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#define SET_TX_BD_PHYSICAL_ADDR2_LOW_8814A(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR2_LOW(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR2_LOW_8814A(__pTxBd) GET_TX_BD_PHYSICAL_ADDR2_LOW(__pTxBd)
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/*TXBD_DW10*/
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#define SET_TX_BD_PHYSICAL_ADDR2_HIGH_8814A(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR2_HIGH(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR2_HIGH_8814A(__pTxBd) GET_TX_BD_PHYSICAL_ADDR2_HIGH(__pTxBd)
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/*TXBD_DW12*/
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#define SET_TX_BD_A3_8814A(__pTxBd, __Value) SET_TX_BD_A3(__pTxBd, __Value)
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#define GET_TX_BD_A3_8814A(__pTxBd) GET_TX_BD_A3(__pTxBd)
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#define SET_TX_BD_TX_BUFF_SIZE3_8814A(__pTxBd, __Value) SET_TX_BD_TX_BUFF_SIZE3(__pTxBd, __Value)
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#define GET_TX_BD_TX_BUFF_SIZE3_8814A(__pTxBd) GET_TX_BD_TX_BUFF_SIZE3(__pTxBd)
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/*TXBD_DW13*/
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#define SET_TX_BD_PHYSICAL_ADDR3_LOW_8814A(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR3_LOW(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR3_LOW_8814A(__pTxBd) GET_TX_BD_PHYSICAL_ADDR3_LOW(__pTxBd)
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/*TXBD_DW14*/
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#define SET_TX_BD_PHYSICAL_ADDR3_HIGH_8814A(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR3_HIGH(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR3_HIGH_8814A(__pTxBd) GET_TX_BD_PHYSICAL_ADDR3_HIGH(__pTxBd)
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#endif
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#if (HALMAC_8822B_SUPPORT)
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/*TXBD_DW0*/
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#define SET_TX_BD_OWN_8822B(__pTxBd, __Value) SET_TX_BD_OWN(__pTxBd, __Value)
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#define GET_TX_BD_OWN_8822B(__pTxBd) GET_TX_BD_OWN(__pTxBd)
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#define SET_TX_BD_PSB_8822B(__pTxBd, __Value) SET_TX_BD_PSB(__pTxBd, __Value)
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#define GET_TX_BD_PSB_8822B(__pTxBd) GET_TX_BD_PSB(__pTxBd)
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#define SET_TX_BD_TX_BUFF_SIZE0_8822B(__pTxBd, __Value) SET_TX_BD_TX_BUFF_SIZE0(__pTxBd, __Value)
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#define GET_TX_BD_TX_BUFF_SIZE0_8822B(__pTxBd) GET_TX_BD_TX_BUFF_SIZE0(__pTxBd)
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/*TXBD_DW1*/
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#define SET_TX_BD_PHYSICAL_ADDR0_LOW_8822B(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR0_LOW(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR0_LOW_8822B(__pTxBd) GET_TX_BD_PHYSICAL_ADDR0_LOW(__pTxBd)
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/*TXBD_DW2*/
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#define SET_TX_BD_PHYSICAL_ADDR0_HIGH_8822B(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR0_HIGH(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR0_HIGH_8822B(__pTxBd) GET_TX_BD_PHYSICAL_ADDR0_HIGH(__pTxBd)
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/*TXBD_DW4*/
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#define SET_TX_BD_A1_8822B(__pTxBd, __Value) SET_TX_BD_A1(__pTxBd, __Value)
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#define GET_TX_BD_A1_8822B(__pTxBd) GET_TX_BD_A1(__pTxBd)
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#define SET_TX_BD_TX_BUFF_SIZE1_8822B(__pTxBd, __Value) SET_TX_BD_TX_BUFF_SIZE1(__pTxBd, __Value)
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#define GET_TX_BD_TX_BUFF_SIZE1_8822B(__pTxBd) GET_TX_BD_TX_BUFF_SIZE1(__pTxBd)
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/*TXBD_DW5*/
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#define SET_TX_BD_PHYSICAL_ADDR1_LOW_8822B(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR1_LOW(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR1_LOW_8822B(__pTxBd) GET_TX_BD_PHYSICAL_ADDR1_LOW(__pTxBd)
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/*TXBD_DW6*/
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#define SET_TX_BD_PHYSICAL_ADDR1_HIGH_8822B(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR1_HIGH(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR1_HIGH_8822B(__pTxBd) GET_TX_BD_PHYSICAL_ADDR1_HIGH(__pTxBd)
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/*TXBD_DW8*/
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#define SET_TX_BD_A2_8822B(__pTxBd, __Value) SET_TX_BD_A2(__pTxBd, __Value)
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#define GET_TX_BD_A2_8822B(__pTxBd) GET_TX_BD_A2(__pTxBd)
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#define SET_TX_BD_TX_BUFF_SIZE2_8822B(__pTxBd, __Value) SET_TX_BD_TX_BUFF_SIZE2(__pTxBd, __Value)
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#define GET_TX_BD_TX_BUFF_SIZE2_8822B(__pTxBd) GET_TX_BD_TX_BUFF_SIZE2(__pTxBd)
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/*TXBD_DW9*/
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#define SET_TX_BD_PHYSICAL_ADDR2_LOW_8822B(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR2_LOW(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR2_LOW_8822B(__pTxBd) GET_TX_BD_PHYSICAL_ADDR2_LOW(__pTxBd)
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/*TXBD_DW10*/
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#define SET_TX_BD_PHYSICAL_ADDR2_HIGH_8822B(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR2_HIGH(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR2_HIGH_8822B(__pTxBd) GET_TX_BD_PHYSICAL_ADDR2_HIGH(__pTxBd)
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/*TXBD_DW12*/
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#define SET_TX_BD_A3_8822B(__pTxBd, __Value) SET_TX_BD_A3(__pTxBd, __Value)
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#define GET_TX_BD_A3_8822B(__pTxBd) GET_TX_BD_A3(__pTxBd)
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#define SET_TX_BD_TX_BUFF_SIZE3_8822B(__pTxBd, __Value) SET_TX_BD_TX_BUFF_SIZE3(__pTxBd, __Value)
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#define GET_TX_BD_TX_BUFF_SIZE3_8822B(__pTxBd) GET_TX_BD_TX_BUFF_SIZE3(__pTxBd)
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/*TXBD_DW13*/
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#define SET_TX_BD_PHYSICAL_ADDR3_LOW_8822B(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR3_LOW(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR3_LOW_8822B(__pTxBd) GET_TX_BD_PHYSICAL_ADDR3_LOW(__pTxBd)
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/*TXBD_DW14*/
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#define SET_TX_BD_PHYSICAL_ADDR3_HIGH_8822B(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR3_HIGH(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR3_HIGH_8822B(__pTxBd) GET_TX_BD_PHYSICAL_ADDR3_HIGH(__pTxBd)
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#endif
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#if (HALMAC_8197F_SUPPORT)
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/*TXBD_DW0*/
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#define SET_TX_BD_OWN_8197F(__pTxBd, __Value) SET_TX_BD_OWN(__pTxBd, __Value)
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#define GET_TX_BD_OWN_8197F(__pTxBd) GET_TX_BD_OWN(__pTxBd)
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#define SET_TX_BD_PSB_8197F(__pTxBd, __Value) SET_TX_BD_PSB(__pTxBd, __Value)
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#define GET_TX_BD_PSB_8197F(__pTxBd) GET_TX_BD_PSB(__pTxBd)
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#define SET_TX_BD_TX_BUFF_SIZE0_8197F(__pTxBd, __Value) SET_TX_BD_TX_BUFF_SIZE0(__pTxBd, __Value)
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#define GET_TX_BD_TX_BUFF_SIZE0_8197F(__pTxBd) GET_TX_BD_TX_BUFF_SIZE0(__pTxBd)
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/*TXBD_DW1*/
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#define SET_TX_BD_PHYSICAL_ADDR0_LOW_8197F(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR0_LOW(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR0_LOW_8197F(__pTxBd) GET_TX_BD_PHYSICAL_ADDR0_LOW(__pTxBd)
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/*TXBD_DW2*/
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#define SET_TX_BD_PHYSICAL_ADDR0_HIGH_8197F(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR0_HIGH(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR0_HIGH_8197F(__pTxBd) GET_TX_BD_PHYSICAL_ADDR0_HIGH(__pTxBd)
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/*TXBD_DW4*/
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#define SET_TX_BD_A1_8197F(__pTxBd, __Value) SET_TX_BD_A1(__pTxBd, __Value)
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#define GET_TX_BD_A1_8197F(__pTxBd) GET_TX_BD_A1(__pTxBd)
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#define SET_TX_BD_TX_BUFF_SIZE1_8197F(__pTxBd, __Value) SET_TX_BD_TX_BUFF_SIZE1(__pTxBd, __Value)
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#define GET_TX_BD_TX_BUFF_SIZE1_8197F(__pTxBd) GET_TX_BD_TX_BUFF_SIZE1(__pTxBd)
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/*TXBD_DW5*/
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#define SET_TX_BD_PHYSICAL_ADDR1_LOW_8197F(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR1_LOW(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR1_LOW_8197F(__pTxBd) GET_TX_BD_PHYSICAL_ADDR1_LOW(__pTxBd)
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/*TXBD_DW6*/
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#define SET_TX_BD_PHYSICAL_ADDR1_HIGH_8197F(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR1_HIGH(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR1_HIGH_8197F(__pTxBd) GET_TX_BD_PHYSICAL_ADDR1_HIGH(__pTxBd)
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/*TXBD_DW8*/
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#define SET_TX_BD_A2_8197F(__pTxBd, __Value) SET_TX_BD_A2(__pTxBd, __Value)
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#define GET_TX_BD_A2_8197F(__pTxBd) GET_TX_BD_A2(__pTxBd)
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#define SET_TX_BD_TX_BUFF_SIZE2_8197F(__pTxBd, __Value) SET_TX_BD_TX_BUFF_SIZE2(__pTxBd, __Value)
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#define GET_TX_BD_TX_BUFF_SIZE2_8197F(__pTxBd) GET_TX_BD_TX_BUFF_SIZE2(__pTxBd)
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/*TXBD_DW9*/
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#define SET_TX_BD_PHYSICAL_ADDR2_LOW_8197F(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR2_LOW(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR2_LOW_8197F(__pTxBd) GET_TX_BD_PHYSICAL_ADDR2_LOW(__pTxBd)
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/*TXBD_DW10*/
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#define SET_TX_BD_PHYSICAL_ADDR2_HIGH_8197F(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR2_HIGH(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR2_HIGH_8197F(__pTxBd) GET_TX_BD_PHYSICAL_ADDR2_HIGH(__pTxBd)
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/*TXBD_DW12*/
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#define SET_TX_BD_A3_8197F(__pTxBd, __Value) SET_TX_BD_A3(__pTxBd, __Value)
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#define GET_TX_BD_A3_8197F(__pTxBd) GET_TX_BD_A3(__pTxBd)
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#define SET_TX_BD_TX_BUFF_SIZE3_8197F(__pTxBd, __Value) SET_TX_BD_TX_BUFF_SIZE3(__pTxBd, __Value)
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#define GET_TX_BD_TX_BUFF_SIZE3_8197F(__pTxBd) GET_TX_BD_TX_BUFF_SIZE3(__pTxBd)
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/*TXBD_DW13*/
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#define SET_TX_BD_PHYSICAL_ADDR3_LOW_8197F(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR3_LOW(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR3_LOW_8197F(__pTxBd) GET_TX_BD_PHYSICAL_ADDR3_LOW(__pTxBd)
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/*TXBD_DW14*/
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#define SET_TX_BD_PHYSICAL_ADDR3_HIGH_8197F(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR3_HIGH(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR3_HIGH_8197F(__pTxBd) GET_TX_BD_PHYSICAL_ADDR3_HIGH(__pTxBd)
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#endif
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#if (HALMAC_8821C_SUPPORT)
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/*TXBD_DW0*/
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#define SET_TX_BD_OWN_8821C(__pTxBd, __Value) SET_TX_BD_OWN(__pTxBd, __Value)
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#define GET_TX_BD_OWN_8821C(__pTxBd) GET_TX_BD_OWN(__pTxBd)
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#define SET_TX_BD_PSB_8821C(__pTxBd, __Value) SET_TX_BD_PSB(__pTxBd, __Value)
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#define GET_TX_BD_PSB_8821C(__pTxBd) GET_TX_BD_PSB(__pTxBd)
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#define SET_TX_BD_TX_BUFF_SIZE0_8821C(__pTxBd, __Value) SET_TX_BD_TX_BUFF_SIZE0(__pTxBd, __Value)
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#define GET_TX_BD_TX_BUFF_SIZE0_8821C(__pTxBd) GET_TX_BD_TX_BUFF_SIZE0(__pTxBd)
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/*TXBD_DW1*/
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#define SET_TX_BD_PHYSICAL_ADDR0_LOW_8821C(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR0_LOW(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR0_LOW_8821C(__pTxBd) GET_TX_BD_PHYSICAL_ADDR0_LOW(__pTxBd)
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/*TXBD_DW2*/
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#define SET_TX_BD_PHYSICAL_ADDR0_HIGH_8821C(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR0_HIGH(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR0_HIGH_8821C(__pTxBd) GET_TX_BD_PHYSICAL_ADDR0_HIGH(__pTxBd)
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/*TXBD_DW4*/
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#define SET_TX_BD_A1_8821C(__pTxBd, __Value) SET_TX_BD_A1(__pTxBd, __Value)
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#define GET_TX_BD_A1_8821C(__pTxBd) GET_TX_BD_A1(__pTxBd)
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#define SET_TX_BD_TX_BUFF_SIZE1_8821C(__pTxBd, __Value) SET_TX_BD_TX_BUFF_SIZE1(__pTxBd, __Value)
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#define GET_TX_BD_TX_BUFF_SIZE1_8821C(__pTxBd) GET_TX_BD_TX_BUFF_SIZE1(__pTxBd)
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/*TXBD_DW5*/
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#define SET_TX_BD_PHYSICAL_ADDR1_LOW_8821C(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR1_LOW(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR1_LOW_8821C(__pTxBd) GET_TX_BD_PHYSICAL_ADDR1_LOW(__pTxBd)
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/*TXBD_DW6*/
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#define SET_TX_BD_PHYSICAL_ADDR1_HIGH_8821C(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR1_HIGH(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR1_HIGH_8821C(__pTxBd) GET_TX_BD_PHYSICAL_ADDR1_HIGH(__pTxBd)
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/*TXBD_DW8*/
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#define SET_TX_BD_A2_8821C(__pTxBd, __Value) SET_TX_BD_A2(__pTxBd, __Value)
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#define GET_TX_BD_A2_8821C(__pTxBd) GET_TX_BD_A2(__pTxBd)
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#define SET_TX_BD_TX_BUFF_SIZE2_8821C(__pTxBd, __Value) SET_TX_BD_TX_BUFF_SIZE2(__pTxBd, __Value)
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#define GET_TX_BD_TX_BUFF_SIZE2_8821C(__pTxBd) GET_TX_BD_TX_BUFF_SIZE2(__pTxBd)
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/*TXBD_DW9*/
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#define SET_TX_BD_PHYSICAL_ADDR2_LOW_8821C(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR2_LOW(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR2_LOW_8821C(__pTxBd) GET_TX_BD_PHYSICAL_ADDR2_LOW(__pTxBd)
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/*TXBD_DW10*/
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#define SET_TX_BD_PHYSICAL_ADDR2_HIGH_8821C(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR2_HIGH(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR2_HIGH_8821C(__pTxBd) GET_TX_BD_PHYSICAL_ADDR2_HIGH(__pTxBd)
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/*TXBD_DW12*/
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#define SET_TX_BD_A3_8821C(__pTxBd, __Value) SET_TX_BD_A3(__pTxBd, __Value)
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#define GET_TX_BD_A3_8821C(__pTxBd) GET_TX_BD_A3(__pTxBd)
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#define SET_TX_BD_TX_BUFF_SIZE3_8821C(__pTxBd, __Value) SET_TX_BD_TX_BUFF_SIZE3(__pTxBd, __Value)
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#define GET_TX_BD_TX_BUFF_SIZE3_8821C(__pTxBd) GET_TX_BD_TX_BUFF_SIZE3(__pTxBd)
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/*TXBD_DW13*/
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#define SET_TX_BD_PHYSICAL_ADDR3_LOW_8821C(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR3_LOW(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR3_LOW_8821C(__pTxBd) GET_TX_BD_PHYSICAL_ADDR3_LOW(__pTxBd)
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/*TXBD_DW14*/
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#define SET_TX_BD_PHYSICAL_ADDR3_HIGH_8821C(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR3_HIGH(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR3_HIGH_8821C(__pTxBd) GET_TX_BD_PHYSICAL_ADDR3_HIGH(__pTxBd)
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#endif
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#if (HALMAC_8188F_SUPPORT)
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/*TXBD_DW0*/
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#define SET_TX_BD_OWN_8188F(__pTxBd, __Value) SET_TX_BD_OWN(__pTxBd, __Value)
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#define GET_TX_BD_OWN_8188F(__pTxBd) GET_TX_BD_OWN(__pTxBd)
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#define SET_TX_BD_PSB_8188F(__pTxBd, __Value) SET_TX_BD_PSB(__pTxBd, __Value)
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#define GET_TX_BD_PSB_8188F(__pTxBd) GET_TX_BD_PSB(__pTxBd)
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#define SET_TX_BD_TX_BUFF_SIZE0_8188F(__pTxBd, __Value) SET_TX_BD_TX_BUFF_SIZE0(__pTxBd, __Value)
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#define GET_TX_BD_TX_BUFF_SIZE0_8188F(__pTxBd) GET_TX_BD_TX_BUFF_SIZE0(__pTxBd)
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/*TXBD_DW1*/
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#define SET_TX_BD_PHYSICAL_ADDR0_LOW_8188F(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR0_LOW(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR0_LOW_8188F(__pTxBd) GET_TX_BD_PHYSICAL_ADDR0_LOW(__pTxBd)
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/*TXBD_DW2*/
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#define SET_TX_BD_PHYSICAL_ADDR0_HIGH_8188F(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR0_HIGH(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR0_HIGH_8188F(__pTxBd) GET_TX_BD_PHYSICAL_ADDR0_HIGH(__pTxBd)
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/*TXBD_DW4*/
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#define SET_TX_BD_A1_8188F(__pTxBd, __Value) SET_TX_BD_A1(__pTxBd, __Value)
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#define GET_TX_BD_A1_8188F(__pTxBd) GET_TX_BD_A1(__pTxBd)
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#define SET_TX_BD_TX_BUFF_SIZE1_8188F(__pTxBd, __Value) SET_TX_BD_TX_BUFF_SIZE1(__pTxBd, __Value)
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#define GET_TX_BD_TX_BUFF_SIZE1_8188F(__pTxBd) GET_TX_BD_TX_BUFF_SIZE1(__pTxBd)
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/*TXBD_DW5*/
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#define SET_TX_BD_PHYSICAL_ADDR1_LOW_8188F(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR1_LOW(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR1_LOW_8188F(__pTxBd) GET_TX_BD_PHYSICAL_ADDR1_LOW(__pTxBd)
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/*TXBD_DW6*/
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#define SET_TX_BD_PHYSICAL_ADDR1_HIGH_8188F(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR1_HIGH(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR1_HIGH_8188F(__pTxBd) GET_TX_BD_PHYSICAL_ADDR1_HIGH(__pTxBd)
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/*TXBD_DW8*/
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#define SET_TX_BD_A2_8188F(__pTxBd, __Value) SET_TX_BD_A2(__pTxBd, __Value)
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#define GET_TX_BD_A2_8188F(__pTxBd) GET_TX_BD_A2(__pTxBd)
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#define SET_TX_BD_TX_BUFF_SIZE2_8188F(__pTxBd, __Value) SET_TX_BD_TX_BUFF_SIZE2(__pTxBd, __Value)
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#define GET_TX_BD_TX_BUFF_SIZE2_8188F(__pTxBd) GET_TX_BD_TX_BUFF_SIZE2(__pTxBd)
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/*TXBD_DW9*/
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#define SET_TX_BD_PHYSICAL_ADDR2_LOW_8188F(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR2_LOW(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR2_LOW_8188F(__pTxBd) GET_TX_BD_PHYSICAL_ADDR2_LOW(__pTxBd)
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/*TXBD_DW10*/
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#define SET_TX_BD_PHYSICAL_ADDR2_HIGH_8188F(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR2_HIGH(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR2_HIGH_8188F(__pTxBd) GET_TX_BD_PHYSICAL_ADDR2_HIGH(__pTxBd)
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/*TXBD_DW12*/
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#define SET_TX_BD_A3_8188F(__pTxBd, __Value) SET_TX_BD_A3(__pTxBd, __Value)
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#define GET_TX_BD_A3_8188F(__pTxBd) GET_TX_BD_A3(__pTxBd)
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#define SET_TX_BD_TX_BUFF_SIZE3_8188F(__pTxBd, __Value) SET_TX_BD_TX_BUFF_SIZE3(__pTxBd, __Value)
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#define GET_TX_BD_TX_BUFF_SIZE3_8188F(__pTxBd) GET_TX_BD_TX_BUFF_SIZE3(__pTxBd)
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/*TXBD_DW13*/
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#define SET_TX_BD_PHYSICAL_ADDR3_LOW_8188F(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR3_LOW(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR3_LOW_8188F(__pTxBd) GET_TX_BD_PHYSICAL_ADDR3_LOW(__pTxBd)
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/*TXBD_DW14*/
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#define SET_TX_BD_PHYSICAL_ADDR3_HIGH_8188F(__pTxBd, __Value) SET_TX_BD_PHYSICAL_ADDR3_HIGH(__pTxBd, __Value)
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#define GET_TX_BD_PHYSICAL_ADDR3_HIGH_8188F(__pTxBd) GET_TX_BD_PHYSICAL_ADDR3_HIGH(__pTxBd)
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#endif
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#endif
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