/*
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* Chip-specific hardware definitions for
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* Broadcom 802.11abg Networking Device Driver
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*
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* Broadcom Proprietary and Confidential. Copyright (C) 2020,
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* All Rights Reserved.
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*
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* This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom;
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* the contents of this file may not be disclosed to third parties,
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* copied or duplicated in any form, in whole or in part, without
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* the prior written permission of Broadcom.
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*
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*
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* <<Broadcom-WL-IPTag/Proprietary:>>
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*/
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#ifndef _D11REGS_H
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#define _D11REGS_H
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#include <typedefs.h>
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#include <sbhndpio.h>
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#include <sbhnddma.h>
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#include <sbconfig.h>
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#if !defined(BCMDONGLEHOST)
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#include <dot11mac_all_regs.h>
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#include <d11regs_comp.h>
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#endif
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#if defined(BCMDONGLEHOST) || defined(WL_UNITTEST)
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typedef struct {
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uint32 pad;
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} d11regdefs_t;
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typedef volatile uint8 d11regs_t;
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typedef struct _d11regs_info {
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uint32 pad;
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} d11regs_info_t;
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#else /* defined(BCMDONGLEHOST) || defined(WL_UNITTEST) */
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typedef volatile struct d11regs d11regs_t;
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typedef struct _d11regs_info {
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d11regs_t *regs;
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} d11regs_info_t;
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#endif /* !defined(BCMDONGLEHOST) || !defined(WL_UNITTEST) */
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typedef volatile struct {
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uint32 intstatus;
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uint32 intmask;
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} intctrlregs_t;
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/**
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* read: 32-bit register that can be read as 32-bit or as 2 16-bit
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* write: only low 16b-it half can be written
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*/
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typedef volatile union {
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uint32 pmqhostdata; /**< read only! */
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struct {
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uint16 pmqctrlstatus; /**< read/write */
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uint16 PAD;
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} w;
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} pmqreg_t;
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/** dma corerev >= 11 */
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typedef volatile struct {
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dma64regs_t dmaxmt; /* dma tx */
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pio4regs_t piotx; /* pio tx */
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dma64regs_t dmarcv; /* dma rx */
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pio4regs_t piorx; /* pio rx */
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} fifo64_t;
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/** indirect dma corerev >= 64 */
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typedef volatile struct {
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dma64regs_t dma; /**< dma tx */
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uint32 indintstatus;
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uint32 indintmask;
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} ind_dma_t;
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/** indirect dma corerev 80, 81, 82 */
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typedef volatile struct {
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uint32 indintstatus;
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uint32 indintmask;
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dma64regs_t dma; /**< dma tx, */
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} ind_dma_axc_t;
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/* access to register offsets and fields defined in dot11mac_all_regs.h */
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#define D11_REG_OFF(regname) \
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dot11mac_##regname##_ADDR
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#define D11_REG_FIELD_MASK(regname, regfield) \
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dot11mac_##regname##__##regfield##_MASK
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#define D11_REG_FIELD_SHIFT(regname, regfield) \
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dot11mac_##regname##__##regfield##_SHIFT
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/* convert register offset to backplane address */
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#ifndef D11_REG_ADDR_CHK
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// #define D11_REG_ADDR_CHK
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#endif
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#ifdef D11_REG_ADDR_CHK
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#define D11_REG_ADDR_EXEMPT(regname) \
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(D11_REG_OFF(regname) == D11_REG_OFF(PHY_REG_ADDR) || \
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D11_REG_OFF(regname) == D11_REG_OFF(radioregaddr) || \
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D11_REG_OFF(regname) == D11_REG_OFF(radioregdata) || \
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D11_REG_OFF(regname) == D11_REG_OFF(OBJ_DATA) || \
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0)
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#define D11_REG32_ADDR(regbase, regname) \
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({ \
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STATIC_ASSERT(D11_REG_ADDR_EXEMPT(regname) || D11_REG_OFF(regname) < 0x3e0); \
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(volatile uint32 *)((uintptr)(regbase) + D11_REG_OFF(regname)); \
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})
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#define D11_REG16_ADDR(regbase, regname) \
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({ \
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STATIC_ASSERT(D11_REG_ADDR_EXEMPT(regname) || D11_REG_OFF(regname) >= 0x3e0); \
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(volatile uint16 *)((uintptr)(regbase) + D11_REG_OFF(regname)); \
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})
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#else /* !D11_REG_ADDR_CHK */
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#define D11_REG32_ADDR(regbase, regname) \
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(volatile uint32 *)((uintptr)(regbase) + D11_REG_OFF(regname))
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#define D11_REG16_ADDR(regbase, regname) \
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(volatile uint16 *)((uintptr)(regbase) + D11_REG_OFF(regname))
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#endif /* !D11_REG_ADDR_CHK */
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/* used in table */
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#define D11_REG32_ADDR_ENTRY(regbase, regname) \
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(volatile uint32 *)((uintptr)(regbase) + D11_REG_OFF(regname))
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#define D11_REG16_ADDR_ENTRY(regbase, regname) \
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(volatile uint16 *)((uintptr)(regbase) + D11_REG_OFF(regname))
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#ifndef D11_NEW_ACCESS_MACROS
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/* MOVED TO src/wl/sys/wlc_hw_priv.h */
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#define GET_MACINTSTATUS(osh, hw) R_REG((osh), D11_MACINTSTATUS(hw))
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#define SET_MACINTSTATUS(osh, hw, val) W_REG((osh), D11_MACINTSTATUS(hw), (val))
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#define GET_MACINTMASK(osh, hw) R_REG((osh), D11_MACINTMASK(hw))
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#define SET_MACINTMASK(osh, hw, val) W_REG((osh), D11_MACINTMASK(hw), (val))
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#define GET_MACINTSTATUS_X(osh, hw) R_REG((osh), D11_MACINTSTATUS_psmx(hw))
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#define SET_MACINTSTATUS_X(osh, hw, val) W_REG((osh), D11_MACINTSTATUS_psmx(hw), (val))
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#define GET_MACINTMASK_X(osh, hw) R_REG((osh), D11_MACINTMASK_psmx(hw))
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#define SET_MACINTMASK_X(osh, hw, val) W_REG((osh), D11_MACINTMASK_psmx(hw), (val))
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#define GET_MACINTSTATUS_EXT(osh, hw) R_REG((osh), D11_MACINTSTATUS_EXT(hw))
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#define SET_MACINTSTATUS_EXT(osh, hw, val) W_REG((osh), D11_MACINTSTATUS_EXT(hw), (val))
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#define GET_MACINTMASK_EXT(osh, hw) R_REG((osh), D11_MACINTMASK_EXT(hw))
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#define SET_MACINTMASK_EXT(osh, hw, val) W_REG((osh), D11_MACINTMASK_EXT(hw), (val))
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#define GET_MACINTSTATUS_EXT_X(osh, hw) R_REG((osh), D11_MACINTSTATUS_EXT_psmx(hw))
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#define SET_MACINTSTATUS_EXT_X(osh, hw, val) W_REG((osh), D11_MACINTSTATUS_EXT_psmx(hw), (val))
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#define GET_MACINTMASK_EXT_X(osh, hw) R_REG((osh), D11_MACINTMASK_EXT_psmx(hw))
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#define SET_MACINTMASK_EXT_X(osh, hw, val) W_REG((osh), D11_MACINTMASK_EXT_psmx(hw), (val))
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#define D11Reggrp_intctrlregs(hw, ix) ((intctrlregs_t*)(((volatile uint8*)D11_intstat0(hw)) + \
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(sizeof(intctrlregs_t)*ix)))
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#define D11Reggrp_inddma(hw, ix) (D11REV_GE(hw->corerev, 86) ? \
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((ind_dma_t*)(((volatile uint8*)D11_ind_xmt_control(hw)) + (sizeof(ind_dma_t)*ix))) : \
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((ind_dma_t*)(((volatile uint8*)D11_inddma(hw)) + (sizeof(ind_dma_t)*ix))))
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#define D11Reggrp_inddma_axc(hw, ix) ((ind_dma_axc_t*)(((volatile uint8*)D11_inddma(hw)) + \
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(sizeof(ind_dma_axc_t)*ix)))
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#define D11Reggrp_indaqm(hw, ix) (D11REV_GE(hw->corerev, 86) ? \
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((ind_dma_t*)(((volatile uint8*)D11_IndAQMctl(hw)) + (sizeof(ind_dma_t)*ix))) : \
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((ind_dma_t*)(((volatile uint8*)D11_indaqm(hw)) + (sizeof(ind_dma_t)*ix))))
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#define D11Reggrp_pmqreg(hw, ix) ((pmqreg_t*)(((volatile uint8*)D11_PMQHOSTDATA(hw)) + \
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(sizeof(pmqreg_t)*ix)))
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#define D11Reggrp_f64regs(hw, ix) ((fifo64_t*)(((volatile uint8*)D11_xmt0ctl(hw)) + \
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(sizeof(fifo64_t)*ix)))
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#define D11Reggrp_dmafifo(hw, ix) ((dma32diag_t*)(((volatile uint8*)D11_fifobase(hw)) + \
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(sizeof(dma32diag_t)*ix)))
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#define D11Reggrp_intrcvlazy(hw, ix) ((volatile uint32*)(((volatile uint8*)D11_intrcvlzy0(hw)) + \
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(sizeof(uint32)*ix)))
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#define D11Reggrp_altintmask(hw, ix) ((volatile uint32*)(((volatile uint8*)D11_alt_intmask0(hw)) + \
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(sizeof(uint32)*ix)))
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#define D11REG_ISVALID(ptr, addr) ((volatile uint16 *)(addr) != \
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((volatile uint16 *) &((ptr)->regs->INVALID_ID)))
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#endif /* D11_NEW_ACCESS_MACROS */
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#endif /* _D11REGS_H */
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