// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright(c) 2016-2018 Intel Corporation. All rights reserved.
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*/
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#include <linux/dma-mapping.h>
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#include <linux/mei.h>
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#include "mei_dev.h"
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/**
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* mei_dmam_dscr_alloc() - allocate a managed coherent buffer
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* for the dma descriptor
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* @dev: mei_device
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* @dscr: dma descriptor
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*
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* Return:
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* * 0 - on success or zero allocation request
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* * -EINVAL - if size is not power of 2
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* * -ENOMEM - of allocation has failed
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*/
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static int mei_dmam_dscr_alloc(struct mei_device *dev,
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struct mei_dma_dscr *dscr)
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{
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if (!dscr->size)
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return 0;
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if (WARN_ON(!is_power_of_2(dscr->size)))
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return -EINVAL;
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if (dscr->vaddr)
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return 0;
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dscr->vaddr = dmam_alloc_coherent(dev->dev, dscr->size, &dscr->daddr,
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GFP_KERNEL);
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if (!dscr->vaddr)
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return -ENOMEM;
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return 0;
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}
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/**
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* mei_dmam_dscr_free() - free a managed coherent buffer
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* from the dma descriptor
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* @dev: mei_device
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* @dscr: dma descriptor
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*/
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static void mei_dmam_dscr_free(struct mei_device *dev,
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struct mei_dma_dscr *dscr)
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{
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if (!dscr->vaddr)
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return;
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dmam_free_coherent(dev->dev, dscr->size, dscr->vaddr, dscr->daddr);
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dscr->vaddr = NULL;
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}
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/**
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* mei_dmam_ring_free() - free dma ring buffers
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* @dev: mei device
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*/
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void mei_dmam_ring_free(struct mei_device *dev)
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{
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int i;
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for (i = 0; i < DMA_DSCR_NUM; i++)
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mei_dmam_dscr_free(dev, &dev->dr_dscr[i]);
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}
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/**
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* mei_dmam_ring_alloc() - allocate dma ring buffers
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* @dev: mei device
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*
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* Return: -ENOMEM on allocation failure 0 otherwise
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*/
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int mei_dmam_ring_alloc(struct mei_device *dev)
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{
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int i;
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for (i = 0; i < DMA_DSCR_NUM; i++)
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if (mei_dmam_dscr_alloc(dev, &dev->dr_dscr[i]))
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goto err;
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return 0;
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err:
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mei_dmam_ring_free(dev);
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return -ENOMEM;
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}
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/**
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* mei_dma_ring_is_allocated() - check if dma ring is allocated
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* @dev: mei device
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*
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* Return: true if dma ring is allocated
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*/
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bool mei_dma_ring_is_allocated(struct mei_device *dev)
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{
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return !!dev->dr_dscr[DMA_DSCR_HOST].vaddr;
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}
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static inline
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struct hbm_dma_ring_ctrl *mei_dma_ring_ctrl(struct mei_device *dev)
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{
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return (struct hbm_dma_ring_ctrl *)dev->dr_dscr[DMA_DSCR_CTRL].vaddr;
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}
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/**
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* mei_dma_ring_reset() - reset the dma control block
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* @dev: mei device
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*/
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void mei_dma_ring_reset(struct mei_device *dev)
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{
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struct hbm_dma_ring_ctrl *ctrl = mei_dma_ring_ctrl(dev);
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if (!ctrl)
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return;
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memset(ctrl, 0, sizeof(*ctrl));
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}
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/**
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* mei_dma_copy_from() - copy from dma ring into buffer
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* @dev: mei device
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* @buf: data buffer
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* @offset: offset in slots.
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* @n: number of slots to copy.
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*/
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static size_t mei_dma_copy_from(struct mei_device *dev, unsigned char *buf,
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u32 offset, u32 n)
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{
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unsigned char *dbuf = dev->dr_dscr[DMA_DSCR_DEVICE].vaddr;
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size_t b_offset = offset << 2;
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size_t b_n = n << 2;
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memcpy(buf, dbuf + b_offset, b_n);
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return b_n;
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}
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/**
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* mei_dma_copy_to() - copy to a buffer to the dma ring
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* @dev: mei device
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* @buf: data buffer
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* @offset: offset in slots.
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* @n: number of slots to copy.
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*/
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static size_t mei_dma_copy_to(struct mei_device *dev, unsigned char *buf,
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u32 offset, u32 n)
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{
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unsigned char *hbuf = dev->dr_dscr[DMA_DSCR_HOST].vaddr;
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size_t b_offset = offset << 2;
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size_t b_n = n << 2;
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memcpy(hbuf + b_offset, buf, b_n);
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return b_n;
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}
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/**
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* mei_dma_ring_read() - read data from the ring
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* @dev: mei device
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* @buf: buffer to read into: may be NULL in case of droping the data.
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* @len: length to read.
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*/
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void mei_dma_ring_read(struct mei_device *dev, unsigned char *buf, u32 len)
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{
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struct hbm_dma_ring_ctrl *ctrl = mei_dma_ring_ctrl(dev);
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u32 dbuf_depth;
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u32 rd_idx, rem, slots;
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if (WARN_ON(!ctrl))
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return;
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dev_dbg(dev->dev, "reading from dma %u bytes\n", len);
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if (!len)
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return;
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dbuf_depth = dev->dr_dscr[DMA_DSCR_DEVICE].size >> 2;
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rd_idx = READ_ONCE(ctrl->dbuf_rd_idx) & (dbuf_depth - 1);
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slots = mei_data2slots(len);
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/* if buf is NULL we drop the packet by advancing the pointer.*/
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if (!buf)
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goto out;
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if (rd_idx + slots > dbuf_depth) {
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buf += mei_dma_copy_from(dev, buf, rd_idx, dbuf_depth - rd_idx);
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rem = slots - (dbuf_depth - rd_idx);
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rd_idx = 0;
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} else {
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rem = slots;
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}
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mei_dma_copy_from(dev, buf, rd_idx, rem);
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out:
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WRITE_ONCE(ctrl->dbuf_rd_idx, ctrl->dbuf_rd_idx + slots);
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}
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static inline u32 mei_dma_ring_hbuf_depth(struct mei_device *dev)
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{
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return dev->dr_dscr[DMA_DSCR_HOST].size >> 2;
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}
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/**
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* mei_dma_ring_empty_slots() - calaculate number of empty slots in dma ring
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* @dev: mei_device
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*
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* Return: number of empty slots
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*/
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u32 mei_dma_ring_empty_slots(struct mei_device *dev)
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{
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struct hbm_dma_ring_ctrl *ctrl = mei_dma_ring_ctrl(dev);
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u32 wr_idx, rd_idx, hbuf_depth, empty;
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if (!mei_dma_ring_is_allocated(dev))
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return 0;
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if (WARN_ON(!ctrl))
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return 0;
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/* easier to work in slots */
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hbuf_depth = mei_dma_ring_hbuf_depth(dev);
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rd_idx = READ_ONCE(ctrl->hbuf_rd_idx);
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wr_idx = READ_ONCE(ctrl->hbuf_wr_idx);
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if (rd_idx > wr_idx)
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empty = rd_idx - wr_idx;
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else
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empty = hbuf_depth - (wr_idx - rd_idx);
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return empty;
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}
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/**
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* mei_dma_ring_write - write data to dma ring host buffer
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*
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* @dev: mei_device
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* @buf: data will be written
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* @len: data length
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*/
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void mei_dma_ring_write(struct mei_device *dev, unsigned char *buf, u32 len)
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{
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struct hbm_dma_ring_ctrl *ctrl = mei_dma_ring_ctrl(dev);
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u32 hbuf_depth;
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u32 wr_idx, rem, slots;
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if (WARN_ON(!ctrl))
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return;
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dev_dbg(dev->dev, "writing to dma %u bytes\n", len);
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hbuf_depth = mei_dma_ring_hbuf_depth(dev);
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wr_idx = READ_ONCE(ctrl->hbuf_wr_idx) & (hbuf_depth - 1);
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slots = mei_data2slots(len);
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if (wr_idx + slots > hbuf_depth) {
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buf += mei_dma_copy_to(dev, buf, wr_idx, hbuf_depth - wr_idx);
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rem = slots - (hbuf_depth - wr_idx);
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wr_idx = 0;
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} else {
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rem = slots;
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}
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mei_dma_copy_to(dev, buf, wr_idx, rem);
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WRITE_ONCE(ctrl->hbuf_wr_idx, ctrl->hbuf_wr_idx + slots);
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}
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