#ifndef _ASM_IA64_SN_SN_SAL_H
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#define _ASM_IA64_SN_SN_SAL_H
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/*
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* System Abstraction Layer definitions for IA64
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (c) 2000-2006 Silicon Graphics, Inc. All rights reserved.
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*/
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#include <linux/types.h>
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#include <asm/sal.h>
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// SGI Specific Calls
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#define SN_SAL_GET_PARTITION_ADDR 0x02000009
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#define SN_SAL_MEMPROTECT 0x0200003e
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#define SN_SAL_WATCHLIST_ALLOC 0x02000070
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#define SN_SAL_WATCHLIST_FREE 0x02000071
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/*
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* SAL Error Codes
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*/
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#define SALRET_MORE_PASSES 1
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#define SALRET_OK 0
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#define SALRET_NOT_IMPLEMENTED (-1)
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#define SALRET_INVALID_ARG (-2)
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#define SALRET_ERROR (-3)
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/*
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* Returns the physical address of the partition's reserved page through
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* an iterative number of calls.
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*
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* On first call, 'cookie' and 'len' should be set to 0, and 'addr'
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* set to the nasid of the partition whose reserved page's address is
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* being sought.
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* On subsequent calls, pass the values, that were passed back on the
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* previous call.
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*
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* While the return status equals SALRET_MORE_PASSES, keep calling
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* this function after first copying 'len' bytes starting at 'addr'
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* into 'buf'. Once the return status equals SALRET_OK, 'addr' will
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* be the physical address of the partition's reserved page. If the
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* return status equals neither of these, an error as occurred.
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*/
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static inline s64
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sn_partition_reserved_page_pa(u64 buf, u64 *cookie, u64 *addr, u64 *len)
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{
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struct ia64_sal_retval rv;
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ia64_sal_oemcall_reentrant(&rv, SN_SAL_GET_PARTITION_ADDR, *cookie,
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*addr, buf, *len, 0, 0, 0);
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*cookie = rv.v0;
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*addr = rv.v1;
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*len = rv.v2;
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return rv.status;
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}
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/*
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* Change memory access protections for a physical address range.
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* nasid_array is not used on Altix, but may be in future architectures.
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* Available memory protection access classes are defined after the function.
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*/
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static inline int
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sn_change_memprotect(u64 paddr, u64 len, u64 perms, u64 *nasid_array)
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{
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struct ia64_sal_retval ret_stuff;
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ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_MEMPROTECT, paddr, len,
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(u64)nasid_array, perms, 0, 0, 0);
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return ret_stuff.status;
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}
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#define SN_MEMPROT_ACCESS_CLASS_0 0x14a080
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#define SN_MEMPROT_ACCESS_CLASS_1 0x2520c2
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#define SN_MEMPROT_ACCESS_CLASS_2 0x14a1ca
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#define SN_MEMPROT_ACCESS_CLASS_3 0x14a290
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#define SN_MEMPROT_ACCESS_CLASS_6 0x084080
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#define SN_MEMPROT_ACCESS_CLASS_7 0x021080
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union sn_watchlist_u {
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u64 val;
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struct {
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u64 blade : 16,
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size : 32,
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filler : 16;
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};
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};
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static inline int
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sn_mq_watchlist_alloc(int blade, void *mq, unsigned int mq_size,
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unsigned long *intr_mmr_offset)
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{
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struct ia64_sal_retval rv;
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unsigned long addr;
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union sn_watchlist_u size_blade;
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int watchlist;
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addr = (unsigned long)mq;
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size_blade.size = mq_size;
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size_blade.blade = blade;
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/*
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* bios returns watchlist number or negative error number.
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*/
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ia64_sal_oemcall_nolock(&rv, SN_SAL_WATCHLIST_ALLOC, addr,
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size_blade.val, (u64)intr_mmr_offset,
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(u64)&watchlist, 0, 0, 0);
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if (rv.status < 0)
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return rv.status;
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return watchlist;
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}
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static inline int
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sn_mq_watchlist_free(int blade, int watchlist_num)
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{
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struct ia64_sal_retval rv;
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ia64_sal_oemcall_nolock(&rv, SN_SAL_WATCHLIST_FREE, blade,
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watchlist_num, 0, 0, 0, 0, 0);
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return rv.status;
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}
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#endif /* _ASM_IA64_SN_SN_SAL_H */
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