/*
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* Copyright 2016 Rockchip Electronics Co. LTD
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __MPP_RC__
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#define __MPP_RC__
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#include "rk_venc_cmd.h"
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#include "mpp_list.h"
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/*
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* mpp rate control contain common caculation methd
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*
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* 1. MppData - data statistic struct
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* size - max valid data number
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* len - valid data number
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* pos - current load/store position
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* val - buffer array pointer
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*/
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typedef struct {
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RK_S32 size;
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RK_S32 len;
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RK_S32 pos;
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RK_S32 *val;
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} MppData;
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/*
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* 2. Proportion Integration Differentiation (PID) control
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*/
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typedef struct {
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RK_S32 p;
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RK_S32 i;
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RK_S32 d;
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RK_S32 coef_p;
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RK_S32 coef_i;
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RK_S32 coef_d;
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RK_S32 div;
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RK_S32 len;
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RK_S32 count;
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} MppPIDCtx;
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/*
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* MppRateControl has three steps work:
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*
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* 1. translate user requirement to bit rate parameters
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* 2. calculate target bit from bit parameters
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* 3. calculate qstep from target bit
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*
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* That is user setting -> target bit -> qstep.
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*
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* This struct will be used in both controller and hal.
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* EncImpl provide step 1 and step 2. Hal provide step 3.
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*
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*/
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typedef enum MppEncGopMode_e {
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/* gop == 0 */
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MPP_GOP_ALL_INTER,
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/* gop == 1 */
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MPP_GOP_ALL_INTRA,
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/* gop < fps */
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MPP_GOP_SMALL,
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/* gop >= fps */
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MPP_GOP_LARGE,
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MPP_GOP_MODE_BUTT,
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} MppEncGopMode;
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typedef enum RC_PARAM_OPS {
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RC_RECORD_REAL_BITS,
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RC_RECORD_QP_SUM,
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RC_RECORD_QP_MIN,
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RC_RECORD_QP_MAX,
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RC_RECORD_SET_QP,
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RC_RECORD_REAL_QP,
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RC_RECORD_SSE_SUM,
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RC_RECORD_WIN_LEN
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} RC_PARAM_OPS;
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typedef struct RecordNode_t {
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struct list_head list;
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/* @frm_cnt starts from ONE */
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RK_U32 frm_cnt;
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RK_U32 bps;
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RK_U32 fps;
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RK_S32 gop;
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RK_S32 bits_per_pic;
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RK_S32 bits_per_intra;
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RK_S32 bits_per_inter;
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RK_U32 tgt_bits;
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RK_U32 bit_min;
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RK_U32 bit_max;
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RK_U32 real_bits;
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RK_S32 acc_intra_bits_in_fps;
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RK_S32 acc_inter_bits_in_fps;
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RK_S32 last_fps_bits;
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float last_intra_percent;
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/* hardware result */
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RK_S32 qp_sum;
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RK_S64 sse_sum;
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RK_S32 set_qp;
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RK_S32 qp_min;
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RK_S32 qp_max;
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RK_S32 real_qp;
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RK_S32 wlen;
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} RecordNode;
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#ifdef __cplusplus
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extern "C" {
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#endif
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MPP_RET mpp_data_init(MppData **p, RK_S32 len);
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void mpp_data_deinit(MppData *p);
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void mpp_data_update(MppData *p, RK_S32 val);
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RK_S32 mpp_data_avg(MppData *p, RK_S32 len, RK_S32 num, RK_S32 denorm);
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void mpp_pid_reset(MppPIDCtx *p);
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void mpp_pid_set_param(MppPIDCtx *p, RK_S32 coef_p, RK_S32 coef_i, RK_S32 coef_d, RK_S32 div, RK_S32 len);
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void mpp_pid_update(MppPIDCtx *p, RK_S32 val);
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RK_S32 mpp_pid_calc(MppPIDCtx *ctx);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __MPP_RC__ */
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