/* Copyright (C) 2015-2020 Free Software Foundation, Inc.
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Contributed by ARM Ltd.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published
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by the Free Software Foundation; either version 3, or (at your
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option) any later version.
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GCC is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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/* Pairs of instructions which can be fused. before including this file,
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define a macro:
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AARCH64_FUSION_PAIR (name, internal_name)
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Where:
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NAME is a string giving a friendly name for the instructions to fuse.
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INTERNAL_NAME gives the internal name suitable for appending to
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AARCH64_FUSE_ to give an enum name. */
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AARCH64_FUSION_PAIR ("mov+movk", MOV_MOVK)
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AARCH64_FUSION_PAIR ("adrp+add", ADRP_ADD)
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AARCH64_FUSION_PAIR ("movk+movk", MOVK_MOVK)
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AARCH64_FUSION_PAIR ("adrp+ldr", ADRP_LDR)
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AARCH64_FUSION_PAIR ("cmp+branch", CMP_BRANCH)
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AARCH64_FUSION_PAIR ("aes+aesmc", AES_AESMC)
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AARCH64_FUSION_PAIR ("alu+branch", ALU_BRANCH)
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AARCH64_FUSION_PAIR ("alu+cbz", ALU_CBZ)
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#undef AARCH64_FUSION_PAIR
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