/*
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* Copyright (C) 2014 Uwe Kleine-Koenig for Pengutronix
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*
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* This program is free software; you can redistribute it and/or modify it under
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* the terms of the GNU General Public License version 2 as published by the
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* Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/i2c.h>
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#include <linux/io.h>
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#include <linux/interrupt.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#define DRIVER_NAME "efm32-i2c"
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#define MASK_VAL(mask, val) ((val << __ffs(mask)) & mask)
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#define REG_CTRL 0x00
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#define REG_CTRL_EN 0x00001
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#define REG_CTRL_SLAVE 0x00002
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#define REG_CTRL_AUTOACK 0x00004
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#define REG_CTRL_AUTOSE 0x00008
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#define REG_CTRL_AUTOSN 0x00010
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#define REG_CTRL_ARBDIS 0x00020
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#define REG_CTRL_GCAMEN 0x00040
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#define REG_CTRL_CLHR__MASK 0x00300
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#define REG_CTRL_BITO__MASK 0x03000
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#define REG_CTRL_BITO_OFF 0x00000
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#define REG_CTRL_BITO_40PCC 0x01000
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#define REG_CTRL_BITO_80PCC 0x02000
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#define REG_CTRL_BITO_160PCC 0x03000
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#define REG_CTRL_GIBITO 0x08000
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#define REG_CTRL_CLTO__MASK 0x70000
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#define REG_CTRL_CLTO_OFF 0x00000
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#define REG_CMD 0x04
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#define REG_CMD_START 0x00001
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#define REG_CMD_STOP 0x00002
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#define REG_CMD_ACK 0x00004
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#define REG_CMD_NACK 0x00008
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#define REG_CMD_CONT 0x00010
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#define REG_CMD_ABORT 0x00020
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#define REG_CMD_CLEARTX 0x00040
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#define REG_CMD_CLEARPC 0x00080
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#define REG_STATE 0x08
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#define REG_STATE_BUSY 0x00001
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#define REG_STATE_MASTER 0x00002
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#define REG_STATE_TRANSMITTER 0x00004
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#define REG_STATE_NACKED 0x00008
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#define REG_STATE_BUSHOLD 0x00010
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#define REG_STATE_STATE__MASK 0x000e0
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#define REG_STATE_STATE_IDLE 0x00000
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#define REG_STATE_STATE_WAIT 0x00020
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#define REG_STATE_STATE_START 0x00040
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#define REG_STATE_STATE_ADDR 0x00060
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#define REG_STATE_STATE_ADDRACK 0x00080
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#define REG_STATE_STATE_DATA 0x000a0
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#define REG_STATE_STATE_DATAACK 0x000c0
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#define REG_STATUS 0x0c
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#define REG_STATUS_PSTART 0x00001
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#define REG_STATUS_PSTOP 0x00002
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#define REG_STATUS_PACK 0x00004
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#define REG_STATUS_PNACK 0x00008
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#define REG_STATUS_PCONT 0x00010
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#define REG_STATUS_PABORT 0x00020
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#define REG_STATUS_TXC 0x00040
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#define REG_STATUS_TXBL 0x00080
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#define REG_STATUS_RXDATAV 0x00100
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#define REG_CLKDIV 0x10
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#define REG_CLKDIV_DIV__MASK 0x001ff
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#define REG_CLKDIV_DIV(div) MASK_VAL(REG_CLKDIV_DIV__MASK, (div))
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#define REG_SADDR 0x14
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#define REG_SADDRMASK 0x18
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#define REG_RXDATA 0x1c
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#define REG_RXDATAP 0x20
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#define REG_TXDATA 0x24
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#define REG_IF 0x28
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#define REG_IF_START 0x00001
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#define REG_IF_RSTART 0x00002
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#define REG_IF_ADDR 0x00004
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#define REG_IF_TXC 0x00008
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#define REG_IF_TXBL 0x00010
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#define REG_IF_RXDATAV 0x00020
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#define REG_IF_ACK 0x00040
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#define REG_IF_NACK 0x00080
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#define REG_IF_MSTOP 0x00100
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#define REG_IF_ARBLOST 0x00200
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#define REG_IF_BUSERR 0x00400
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#define REG_IF_BUSHOLD 0x00800
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#define REG_IF_TXOF 0x01000
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#define REG_IF_RXUF 0x02000
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#define REG_IF_BITO 0x04000
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#define REG_IF_CLTO 0x08000
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#define REG_IF_SSTOP 0x10000
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#define REG_IFS 0x2c
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#define REG_IFC 0x30
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#define REG_IFC__MASK 0x1ffcf
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#define REG_IEN 0x34
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#define REG_ROUTE 0x38
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#define REG_ROUTE_SDAPEN 0x00001
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#define REG_ROUTE_SCLPEN 0x00002
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#define REG_ROUTE_LOCATION__MASK 0x00700
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#define REG_ROUTE_LOCATION(n) MASK_VAL(REG_ROUTE_LOCATION__MASK, (n))
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struct efm32_i2c_ddata {
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struct i2c_adapter adapter;
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struct clk *clk;
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void __iomem *base;
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unsigned int irq;
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u8 location;
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unsigned long frequency;
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/* transfer data */
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struct completion done;
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struct i2c_msg *msgs;
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size_t num_msgs;
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size_t current_word, current_msg;
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int retval;
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};
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static u32 efm32_i2c_read32(struct efm32_i2c_ddata *ddata, unsigned offset)
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{
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return readl(ddata->base + offset);
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}
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static void efm32_i2c_write32(struct efm32_i2c_ddata *ddata,
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unsigned offset, u32 value)
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{
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writel(value, ddata->base + offset);
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}
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static void efm32_i2c_send_next_msg(struct efm32_i2c_ddata *ddata)
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{
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struct i2c_msg *cur_msg = &ddata->msgs[ddata->current_msg];
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efm32_i2c_write32(ddata, REG_CMD, REG_CMD_START);
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efm32_i2c_write32(ddata, REG_TXDATA, i2c_8bit_addr_from_msg(cur_msg));
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}
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static void efm32_i2c_send_next_byte(struct efm32_i2c_ddata *ddata)
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{
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struct i2c_msg *cur_msg = &ddata->msgs[ddata->current_msg];
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if (ddata->current_word >= cur_msg->len) {
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/* cur_msg completely transferred */
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ddata->current_word = 0;
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ddata->current_msg += 1;
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if (ddata->current_msg >= ddata->num_msgs) {
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efm32_i2c_write32(ddata, REG_CMD, REG_CMD_STOP);
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complete(&ddata->done);
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} else {
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efm32_i2c_send_next_msg(ddata);
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}
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} else {
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efm32_i2c_write32(ddata, REG_TXDATA,
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cur_msg->buf[ddata->current_word++]);
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}
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}
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static void efm32_i2c_recv_next_byte(struct efm32_i2c_ddata *ddata)
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{
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struct i2c_msg *cur_msg = &ddata->msgs[ddata->current_msg];
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cur_msg->buf[ddata->current_word] = efm32_i2c_read32(ddata, REG_RXDATA);
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ddata->current_word += 1;
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if (ddata->current_word >= cur_msg->len) {
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/* cur_msg completely transferred */
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ddata->current_word = 0;
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ddata->current_msg += 1;
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efm32_i2c_write32(ddata, REG_CMD, REG_CMD_NACK);
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if (ddata->current_msg >= ddata->num_msgs) {
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efm32_i2c_write32(ddata, REG_CMD, REG_CMD_STOP);
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complete(&ddata->done);
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} else {
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efm32_i2c_send_next_msg(ddata);
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}
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} else {
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efm32_i2c_write32(ddata, REG_CMD, REG_CMD_ACK);
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}
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}
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static irqreturn_t efm32_i2c_irq(int irq, void *dev_id)
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{
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struct efm32_i2c_ddata *ddata = dev_id;
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struct i2c_msg *cur_msg = &ddata->msgs[ddata->current_msg];
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u32 irqflag = efm32_i2c_read32(ddata, REG_IF);
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u32 state = efm32_i2c_read32(ddata, REG_STATE);
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efm32_i2c_write32(ddata, REG_IFC, irqflag & REG_IFC__MASK);
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switch (state & REG_STATE_STATE__MASK) {
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case REG_STATE_STATE_IDLE:
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/* arbitration lost? */
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ddata->retval = -EAGAIN;
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complete(&ddata->done);
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break;
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case REG_STATE_STATE_WAIT:
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/*
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* huh, this shouldn't happen.
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* Reset hardware state and get out
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*/
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ddata->retval = -EIO;
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efm32_i2c_write32(ddata, REG_CMD,
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REG_CMD_STOP | REG_CMD_ABORT |
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REG_CMD_CLEARTX | REG_CMD_CLEARPC);
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complete(&ddata->done);
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break;
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case REG_STATE_STATE_START:
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/* "caller" is expected to send an address */
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break;
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case REG_STATE_STATE_ADDR:
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/* wait for Ack or NAck of slave */
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break;
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case REG_STATE_STATE_ADDRACK:
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if (state & REG_STATE_NACKED) {
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efm32_i2c_write32(ddata, REG_CMD, REG_CMD_STOP);
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ddata->retval = -ENXIO;
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complete(&ddata->done);
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} else if (cur_msg->flags & I2C_M_RD) {
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/* wait for slave to send first data byte */
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} else {
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efm32_i2c_send_next_byte(ddata);
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}
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break;
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case REG_STATE_STATE_DATA:
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if (cur_msg->flags & I2C_M_RD) {
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efm32_i2c_recv_next_byte(ddata);
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} else {
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/* wait for Ack or Nack of slave */
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}
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break;
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case REG_STATE_STATE_DATAACK:
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if (state & REG_STATE_NACKED) {
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efm32_i2c_write32(ddata, REG_CMD, REG_CMD_STOP);
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complete(&ddata->done);
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} else {
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efm32_i2c_send_next_byte(ddata);
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}
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}
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return IRQ_HANDLED;
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}
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static int efm32_i2c_master_xfer(struct i2c_adapter *adap,
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struct i2c_msg *msgs, int num)
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{
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struct efm32_i2c_ddata *ddata = i2c_get_adapdata(adap);
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int ret;
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if (ddata->msgs)
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return -EBUSY;
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ddata->msgs = msgs;
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ddata->num_msgs = num;
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ddata->current_word = 0;
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ddata->current_msg = 0;
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ddata->retval = -EIO;
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reinit_completion(&ddata->done);
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dev_dbg(&ddata->adapter.dev, "state: %08x, status: %08x\n",
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efm32_i2c_read32(ddata, REG_STATE),
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efm32_i2c_read32(ddata, REG_STATUS));
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efm32_i2c_send_next_msg(ddata);
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wait_for_completion(&ddata->done);
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if (ddata->current_msg >= ddata->num_msgs)
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ret = ddata->num_msgs;
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else
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ret = ddata->retval;
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return ret;
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}
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static u32 efm32_i2c_functionality(struct i2c_adapter *adap)
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{
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return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
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}
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static const struct i2c_algorithm efm32_i2c_algo = {
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.master_xfer = efm32_i2c_master_xfer,
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.functionality = efm32_i2c_functionality,
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};
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static u32 efm32_i2c_get_configured_location(struct efm32_i2c_ddata *ddata)
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{
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u32 reg = efm32_i2c_read32(ddata, REG_ROUTE);
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return (reg & REG_ROUTE_LOCATION__MASK) >>
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__ffs(REG_ROUTE_LOCATION__MASK);
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}
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static int efm32_i2c_probe(struct platform_device *pdev)
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{
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struct efm32_i2c_ddata *ddata;
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struct resource *res;
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unsigned long rate;
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struct device_node *np = pdev->dev.of_node;
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u32 location, frequency;
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int ret;
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u32 clkdiv;
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if (!np)
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return -EINVAL;
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ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL);
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if (!ddata)
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return -ENOMEM;
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platform_set_drvdata(pdev, ddata);
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init_completion(&ddata->done);
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strlcpy(ddata->adapter.name, pdev->name, sizeof(ddata->adapter.name));
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ddata->adapter.owner = THIS_MODULE;
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ddata->adapter.algo = &efm32_i2c_algo;
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ddata->adapter.dev.parent = &pdev->dev;
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ddata->adapter.dev.of_node = pdev->dev.of_node;
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i2c_set_adapdata(&ddata->adapter, ddata);
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ddata->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(ddata->clk)) {
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ret = PTR_ERR(ddata->clk);
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dev_err(&pdev->dev, "failed to get clock: %d\n", ret);
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return ret;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(&pdev->dev, "failed to determine base address\n");
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return -ENODEV;
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}
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if (resource_size(res) < 0x42) {
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dev_err(&pdev->dev, "memory resource too small\n");
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return -EINVAL;
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}
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ddata->base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(ddata->base))
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return PTR_ERR(ddata->base);
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ret = platform_get_irq(pdev, 0);
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if (ret <= 0) {
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dev_err(&pdev->dev, "failed to get irq (%d)\n", ret);
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if (!ret)
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ret = -EINVAL;
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return ret;
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}
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ddata->irq = ret;
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ret = clk_prepare_enable(ddata->clk);
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if (ret < 0) {
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dev_err(&pdev->dev, "failed to enable clock (%d)\n", ret);
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return ret;
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}
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ret = of_property_read_u32(np, "energymicro,location", &location);
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if (ret)
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/* fall back to wrongly namespaced property */
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ret = of_property_read_u32(np, "efm32,location", &location);
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if (!ret) {
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dev_dbg(&pdev->dev, "using location %u\n", location);
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} else {
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/* default to location configured in hardware */
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location = efm32_i2c_get_configured_location(ddata);
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dev_info(&pdev->dev, "fall back to location %u\n", location);
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}
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ddata->location = location;
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ret = of_property_read_u32(np, "clock-frequency", &frequency);
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if (!ret) {
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dev_dbg(&pdev->dev, "using frequency %u\n", frequency);
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} else {
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frequency = 100000;
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dev_info(&pdev->dev, "defaulting to 100 kHz\n");
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}
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ddata->frequency = frequency;
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rate = clk_get_rate(ddata->clk);
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if (!rate) {
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dev_err(&pdev->dev, "there is no input clock available\n");
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ret = -EINVAL;
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goto err_disable_clk;
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}
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clkdiv = DIV_ROUND_UP(rate, 8 * ddata->frequency) - 1;
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if (clkdiv >= 0x200) {
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dev_err(&pdev->dev,
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"input clock too fast (%lu) to divide down to bus freq (%lu)",
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rate, ddata->frequency);
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ret = -EINVAL;
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goto err_disable_clk;
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}
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dev_dbg(&pdev->dev, "input clock = %lu, bus freq = %lu, clkdiv = %lu\n",
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rate, ddata->frequency, (unsigned long)clkdiv);
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efm32_i2c_write32(ddata, REG_CLKDIV, REG_CLKDIV_DIV(clkdiv));
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efm32_i2c_write32(ddata, REG_ROUTE, REG_ROUTE_SDAPEN |
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REG_ROUTE_SCLPEN |
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REG_ROUTE_LOCATION(ddata->location));
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efm32_i2c_write32(ddata, REG_CTRL, REG_CTRL_EN |
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REG_CTRL_BITO_160PCC | 0 * REG_CTRL_GIBITO);
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efm32_i2c_write32(ddata, REG_IFC, REG_IFC__MASK);
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efm32_i2c_write32(ddata, REG_IEN, REG_IF_TXC | REG_IF_ACK | REG_IF_NACK
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| REG_IF_ARBLOST | REG_IF_BUSERR | REG_IF_RXDATAV);
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/* to make bus idle */
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efm32_i2c_write32(ddata, REG_CMD, REG_CMD_ABORT);
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ret = request_irq(ddata->irq, efm32_i2c_irq, 0, DRIVER_NAME, ddata);
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if (ret < 0) {
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dev_err(&pdev->dev, "failed to request irq (%d)\n", ret);
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goto err_disable_clk;
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}
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ret = i2c_add_adapter(&ddata->adapter);
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if (ret) {
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free_irq(ddata->irq, ddata);
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err_disable_clk:
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clk_disable_unprepare(ddata->clk);
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}
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return ret;
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}
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static int efm32_i2c_remove(struct platform_device *pdev)
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{
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struct efm32_i2c_ddata *ddata = platform_get_drvdata(pdev);
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i2c_del_adapter(&ddata->adapter);
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free_irq(ddata->irq, ddata);
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clk_disable_unprepare(ddata->clk);
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return 0;
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}
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static const struct of_device_id efm32_i2c_dt_ids[] = {
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{
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.compatible = "energymicro,efm32-i2c",
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}, {
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/* sentinel */
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}
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};
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MODULE_DEVICE_TABLE(of, efm32_i2c_dt_ids);
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static struct platform_driver efm32_i2c_driver = {
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.probe = efm32_i2c_probe,
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.remove = efm32_i2c_remove,
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.driver = {
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.name = DRIVER_NAME,
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.of_match_table = efm32_i2c_dt_ids,
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},
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};
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module_platform_driver(efm32_i2c_driver);
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MODULE_AUTHOR("Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>");
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MODULE_DESCRIPTION("EFM32 i2c driver");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("platform:" DRIVER_NAME);
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