Exynos MIPI DSI Master
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Required properties:
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- compatible: value should be one of the following
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"samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */
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"samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */
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"samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */
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"samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */
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"samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */
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- reg: physical base address and length of the registers set for the device
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- interrupts: should contain DSI interrupt
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- clocks: list of clock specifiers, must contain an entry for each required
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entry in clock-names
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- clock-names: should include "bus_clk"and "sclk_mipi" entries
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the use of "pll_clk" is deprecated
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- phys: list of phy specifiers, must contain an entry for each required
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entry in phy-names
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- phy-names: should include "dsim" entry
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- vddcore-supply: MIPI DSIM Core voltage supply (e.g. 1.1V)
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- vddio-supply: MIPI DSIM I/O and PLL voltage supply (e.g. 1.8V)
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- samsung,pll-clock-frequency: specifies frequency of the oscillator clock
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- #address-cells, #size-cells: should be set respectively to <1> and <0>
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according to DSI host bindings (see MIPI DSI bindings [1])
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- samsung,burst-clock-frequency: specifies DSI frequency in high-speed burst
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mode
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- samsung,esc-clock-frequency: specifies DSI frequency in escape mode
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Optional properties:
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- power-domains: a phandle to DSIM power domain node
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Child nodes:
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Should contain DSI peripheral nodes (see MIPI DSI bindings [1]).
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Video interfaces:
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Device node can contain following video interface port nodes according to [2]:
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0: RGB input,
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1: DSI output
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[1]: Documentation/devicetree/bindings/display/mipi-dsi-bus.txt
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[2]: Documentation/devicetree/bindings/media/video-interfaces.txt
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Example:
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dsi@11c80000 {
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compatible = "samsung,exynos4210-mipi-dsi";
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reg = <0x11C80000 0x10000>;
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interrupts = <0 79 0>;
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clocks = <&clock 286>, <&clock 143>;
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clock-names = "bus_clk", "sclk_mipi";
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phys = <&mipi_phy 1>;
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phy-names = "dsim";
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vddcore-supply = <&vusb_reg>;
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vddio-supply = <&vmipi_reg>;
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power-domains = <&pd_lcd0>;
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#address-cells = <1>;
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#size-cells = <0>;
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samsung,pll-clock-frequency = <24000000>;
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panel@1 {
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reg = <0>;
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...
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port {
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panel_ep: endpoint {
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remote-endpoint = <&dsi_ep>;
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};
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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decon_to_mic: endpoint {
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remote-endpoint = <&mic_to_decon>;
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};
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};
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port@1 {
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reg = <1>;
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dsi_ep: endpoint {
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reg = <0>;
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samsung,burst-clock-frequency = <500000000>;
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samsung,esc-clock-frequency = <20000000>;
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remote-endpoint = <&panel_ep>;
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};
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};
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};
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};
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