/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* STK1160 driver
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*
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* Copyright (C) 2012 Ezequiel Garcia
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* <elezegarcia--a.t--gmail.com>
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*
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* Based on Easycap driver by R.M. Thomas
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* Copyright (C) 2010 R.M. Thomas
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* <rmthomas--a.t--sciolus.org>
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*/
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/* GPIO Control */
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#define STK1160_GCTRL 0x000
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/* Remote Wakeup Control */
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#define STK1160_RMCTL 0x00c
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/* Power-on Strapping Data */
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#define STK1160_POSVA 0x010
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#define STK1160_POSV_L 0x010
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#define STK1160_POSV_M 0x011
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#define STK1160_POSV_H 0x012
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#define STK1160_POSV_L_ACDOUT BIT(3)
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#define STK1160_POSV_L_ACSYNC BIT(2)
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/*
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* Decoder Control Register:
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* This byte controls capture start/stop
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* with bit #7 (0x?? OR 0x80 to activate).
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*/
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#define STK1160_DCTRL 0x100
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/*
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* Decimation Control Register:
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* Byte 104: Horizontal Decimation Line Unit Count
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* Byte 105: Vertical Decimation Line Unit Count
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* Byte 106: Decimation Control
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* Bit 0 - Horizontal Decimation Control
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* 0 Horizontal decimation is disabled.
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* 1 Horizontal decimation is enabled.
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* Bit 1 - Decimates Half or More Column
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* 0 Decimates less than half from original column,
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* send count unit (0x105) before each unit skipped.
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* 1 Decimates half or more from original column,
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* skip count unit (0x105) before each unit sent.
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* Bit 2 - Vertical Decimation Control
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* 0 Vertical decimation is disabled.
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* 1 Vertical decimation is enabled.
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* Bit 3 - Vertical Greater or Equal to Half
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* 0 Decimates less than half from original row,
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* send count unit (0x105) before each unit skipped.
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* 1 Decimates half or more from original row,
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* skip count unit (0x105) before each unit sent.
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* Bit 4 - Decimation Unit
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* 0 Decimation will work with 2 rows or columns per unit.
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* 1 Decimation will work with 4 rows or columns per unit.
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*/
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#define STK1160_DMCTRL_H_UNITS 0x104
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#define STK1160_DMCTRL_V_UNITS 0x105
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#define STK1160_DMCTRL 0x106
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#define STK1160_H_DEC_EN BIT(0)
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#define STK1160_H_DEC_MODE BIT(1)
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#define STK1160_V_DEC_EN BIT(2)
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#define STK1160_V_DEC_MODE BIT(3)
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#define STK1160_DEC_UNIT_SIZE BIT(4)
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/* Capture Frame Start Position */
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#define STK116_CFSPO 0x110
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#define STK116_CFSPO_STX_L 0x110
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#define STK116_CFSPO_STX_H 0x111
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#define STK116_CFSPO_STY_L 0x112
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#define STK116_CFSPO_STY_H 0x113
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/* Capture Frame End Position */
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#define STK116_CFEPO 0x114
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#define STK116_CFEPO_ENX_L 0x114
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#define STK116_CFEPO_ENX_H 0x115
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#define STK116_CFEPO_ENY_L 0x116
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#define STK116_CFEPO_ENY_H 0x117
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/* Serial Interface Control */
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#define STK1160_SICTL 0x200
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#define STK1160_SICTL_CD 0x202
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#define STK1160_SICTL_SDA 0x203
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/* Serial Bus Write */
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#define STK1160_SBUSW 0x204
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#define STK1160_SBUSW_WA 0x204
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#define STK1160_SBUSW_WD 0x205
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/* Serial Bus Read */
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#define STK1160_SBUSR 0x208
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#define STK1160_SBUSR_RA 0x208
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#define STK1160_SBUSR_RD 0x209
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/* Alternate Serial Interface Control */
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#define STK1160_ASIC 0x2fc
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/* PLL Select Options */
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#define STK1160_PLLSO 0x018
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/* PLL Frequency Divider */
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#define STK1160_PLLFD 0x01c
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/* Timing Generator */
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#define STK1160_TIGEN 0x300
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/* Timing Control Parameter */
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#define STK1160_TICTL 0x350
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/* AC97 Audio Control */
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#define STK1160_AC97CTL_0 0x500
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#define STK1160_AC97CTL_1 0x504
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#define STK1160_AC97CTL_0_CR BIT(1)
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#define STK1160_AC97CTL_0_CW BIT(2)
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/* Use [0:6] bits of register 0x504 to set codec command address */
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#define STK1160_AC97_ADDR 0x504
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/* Use [16:31] bits of register 0x500 to set codec command data */
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#define STK1160_AC97_CMD 0x502
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/* Audio I2S Interface */
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#define STK1160_I2SCTL 0x50c
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/* EEPROM Interface */
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#define STK1160_EEPROM_SZ 0x5f0
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