# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clauseyy
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/spi-rockchip-slave.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Rockchip SPI Slave Controller
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description:
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The Rockchip SPI Slave controller is used to interface with SPI Master Controller.
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allOf:
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- $ref: "spi-controller.yaml#"
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maintainers:
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- Heiko Stuebner <heiko@sntech.de>
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# Everything else is described in the common file
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properties:
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compatible:
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oneOf:
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- const: rockchip,spi-slave
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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items:
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- description: transfer-clock
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- description: peripheral clock
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clock-names:
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items:
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- const: spiclk
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- const: apb_pclk
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- const: sclk_in
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dmas:
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items:
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- description: TX DMA Channel
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- description: RX DMA Channel
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dma-names:
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items:
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- const: tx
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- const: rx
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rockchip,cs-inactive-disable:
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description: Add this property to disable the cs inactive interrupt for spi
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slave.
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type: boolean
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ready-gpios:
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description: GPIO spec for the spi slave ready signal.
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maxItems: 1
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rockchip,autosuspend-delay-ms:
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default: 0
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description: Set pm runtime autosuspend value in milliseconds.
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rockchip,sram:
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description: Specify sram buffer as SPI Slave DMA buffer.
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/rk3188-cru-common.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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spi0: spi@ff110000 {
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compatible = "rockchip,spi-slave";
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reg = <0xff110000 0x1000>;
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interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru CLK_SPI0>, <&cru PCLK_SPI0>, <&cru SCLK_IN_SPI0>;
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clock-names = "spiclk", "apb_pclk", "sclk_in";
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dmas = <&pdma1 11>, <&pdma1 12>;
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dma-names = "tx", "rx";
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#address-cells = <1>;
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#size-cells = <0>;
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ready-gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_LOW>;
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};
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