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| QCOM Secure Channel Manager (SCM)
|
| Qualcomm processors include an interface to communicate to the secure firmware.
| This interface allows for clients to request different types of actions. These
| can include CPU power up/down, HDCP requests, loading of firmware, and other
| assorted actions.
|
| Required properties:
| - compatible: must contain one of the following:
| * "qcom,scm-apq8064"
| * "qcom,scm-apq8084"
| * "qcom,scm-ipq4019"
| * "qcom,scm-ipq806x"
| * "qcom,scm-ipq8074"
| * "qcom,scm-msm8660"
| * "qcom,scm-msm8916"
| * "qcom,scm-msm8960"
| * "qcom,scm-msm8974"
| * "qcom,scm-msm8994"
| * "qcom,scm-msm8996"
| * "qcom,scm-msm8998"
| * "qcom,scm-sc7180"
| * "qcom,scm-sdm845"
| * "qcom,scm-sm8150"
| and:
| * "qcom,scm"
| - clocks: Specifies clocks needed by the SCM interface, if any:
| * core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660" and
| "qcom,scm-msm8960"
| * core, iface and bus clocks required for "qcom,scm-apq8084",
| "qcom,scm-msm8916" and "qcom,scm-msm8974"
| - clock-names: Must contain "core" for the core clock, "iface" for the interface
| clock and "bus" for the bus clock per the requirements of the compatible.
| - qcom,dload-mode: phandle to the TCSR hardware block and offset of the
| download mode control register (optional)
|
| Example for MSM8916:
|
| firmware {
| scm {
| compatible = "qcom,msm8916", "qcom,scm";
| clocks = <&gcc GCC_CRYPTO_CLK> ,
| <&gcc GCC_CRYPTO_AXI_CLK>,
| <&gcc GCC_CRYPTO_AHB_CLK>;
| clock-names = "core", "bus", "iface";
| };
| };
|
|
