/*
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* arch/xtensa/kernel/time.c
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*
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* Timer and clock support.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2005 Tensilica Inc.
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*
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* Chris Zankel <chris@zankel.net>
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*/
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/time.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/profile.h>
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#include <linux/delay.h>
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#include <linux/irqdomain.h>
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#include <linux/sched_clock.h>
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#include <asm/timex.h>
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#include <asm/platform.h>
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unsigned long ccount_freq; /* ccount Hz */
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EXPORT_SYMBOL(ccount_freq);
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static u64 ccount_read(struct clocksource *cs)
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{
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return (u64)get_ccount();
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}
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static u64 notrace ccount_sched_clock_read(void)
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{
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return get_ccount();
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}
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static struct clocksource ccount_clocksource = {
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.name = "ccount",
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.rating = 200,
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.read = ccount_read,
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static int ccount_timer_set_next_event(unsigned long delta,
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struct clock_event_device *dev);
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struct ccount_timer {
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struct clock_event_device evt;
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int irq_enabled;
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char name[24];
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};
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static DEFINE_PER_CPU(struct ccount_timer, ccount_timer);
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static int ccount_timer_set_next_event(unsigned long delta,
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struct clock_event_device *dev)
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{
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unsigned long flags, next;
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int ret = 0;
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local_irq_save(flags);
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next = get_ccount() + delta;
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set_linux_timer(next);
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if (next - get_ccount() > delta)
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ret = -ETIME;
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local_irq_restore(flags);
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return ret;
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}
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/*
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* There is no way to disable the timer interrupt at the device level,
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* only at the intenable register itself. Since enable_irq/disable_irq
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* calls are nested, we need to make sure that these calls are
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* balanced.
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*/
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static int ccount_timer_shutdown(struct clock_event_device *evt)
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{
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struct ccount_timer *timer =
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container_of(evt, struct ccount_timer, evt);
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if (timer->irq_enabled) {
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disable_irq_nosync(evt->irq);
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timer->irq_enabled = 0;
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}
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return 0;
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}
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static int ccount_timer_set_oneshot(struct clock_event_device *evt)
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{
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struct ccount_timer *timer =
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container_of(evt, struct ccount_timer, evt);
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if (!timer->irq_enabled) {
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enable_irq(evt->irq);
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timer->irq_enabled = 1;
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}
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return 0;
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}
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static irqreturn_t timer_interrupt(int irq, void *dev_id);
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static struct irqaction timer_irqaction = {
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.handler = timer_interrupt,
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.flags = IRQF_TIMER,
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.name = "timer",
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};
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void local_timer_setup(unsigned cpu)
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{
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struct ccount_timer *timer = &per_cpu(ccount_timer, cpu);
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struct clock_event_device *clockevent = &timer->evt;
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timer->irq_enabled = 1;
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clockevent->name = timer->name;
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snprintf(timer->name, sizeof(timer->name), "ccount_clockevent_%u", cpu);
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clockevent->features = CLOCK_EVT_FEAT_ONESHOT;
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clockevent->rating = 300;
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clockevent->set_next_event = ccount_timer_set_next_event;
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clockevent->set_state_shutdown = ccount_timer_shutdown;
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clockevent->set_state_oneshot = ccount_timer_set_oneshot;
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clockevent->tick_resume = ccount_timer_set_oneshot;
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clockevent->cpumask = cpumask_of(cpu);
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clockevent->irq = irq_create_mapping(NULL, LINUX_TIMER_INT);
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if (WARN(!clockevent->irq, "error: can't map timer irq"))
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return;
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clockevents_config_and_register(clockevent, ccount_freq,
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0xf, 0xffffffff);
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}
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#ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
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#ifdef CONFIG_OF
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static void __init calibrate_ccount(void)
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{
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struct device_node *cpu;
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struct clk *clk;
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cpu = of_find_compatible_node(NULL, NULL, "cdns,xtensa-cpu");
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if (cpu) {
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clk = of_clk_get(cpu, 0);
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if (!IS_ERR(clk)) {
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ccount_freq = clk_get_rate(clk);
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return;
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} else {
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pr_warn("%s: CPU input clock not found\n",
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__func__);
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}
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} else {
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pr_warn("%s: CPU node not found in the device tree\n",
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__func__);
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}
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platform_calibrate_ccount();
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}
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#else
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static inline void calibrate_ccount(void)
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{
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platform_calibrate_ccount();
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}
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#endif
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#endif
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void __init time_init(void)
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{
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of_clk_init(NULL);
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#ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
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pr_info("Calibrating CPU frequency ");
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calibrate_ccount();
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pr_cont("%d.%02d MHz\n",
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(int)ccount_freq / 1000000,
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(int)(ccount_freq / 10000) % 100);
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#else
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ccount_freq = CONFIG_XTENSA_CPU_CLOCK*1000000UL;
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#endif
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WARN(!ccount_freq,
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"%s: CPU clock frequency is not set up correctly\n",
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__func__);
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clocksource_register_hz(&ccount_clocksource, ccount_freq);
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local_timer_setup(0);
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setup_irq(this_cpu_ptr(&ccount_timer)->evt.irq, &timer_irqaction);
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sched_clock_register(ccount_sched_clock_read, 32, ccount_freq);
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timer_probe();
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}
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/*
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* The timer interrupt is called HZ times per second.
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*/
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irqreturn_t timer_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *evt = &this_cpu_ptr(&ccount_timer)->evt;
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set_linux_timer(get_linux_timer());
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evt->event_handler(evt);
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/* Allow platform to do something useful (Wdog). */
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platform_heartbeat();
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return IRQ_HANDLED;
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}
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#ifndef CONFIG_GENERIC_CALIBRATE_DELAY
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void calibrate_delay(void)
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{
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loops_per_jiffy = ccount_freq / HZ;
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pr_info("Calibrating delay loop (skipped)... %lu.%02lu BogoMIPS preset\n",
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loops_per_jiffy / (1000000 / HZ),
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(loops_per_jiffy / (10000 / HZ)) % 100);
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}
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#endif
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