// SPDX-License-Identifier: GPL-2.0
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/*
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* linux/arch/xtensa/kernel/irq.c
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*
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* Xtensa built-in interrupt controller and some generic functions copied
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* from i386.
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*
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* Copyright (C) 2002 - 2013 Tensilica, Inc.
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* Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
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*
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*
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* Chris Zankel <chris@zankel.net>
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* Kevin Chea
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*
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*/
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#include <linux/module.h>
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#include <linux/seq_file.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/kernel_stat.h>
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#include <linux/irqchip.h>
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#include <linux/irqchip/xtensa-mx.h>
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#include <linux/irqchip/xtensa-pic.h>
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#include <linux/irqdomain.h>
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#include <linux/of.h>
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#include <asm/mxregs.h>
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#include <linux/uaccess.h>
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#include <asm/platform.h>
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DECLARE_PER_CPU(unsigned long, nmi_count);
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asmlinkage void do_IRQ(int hwirq, struct pt_regs *regs)
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{
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int irq = irq_find_mapping(NULL, hwirq);
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#ifdef CONFIG_DEBUG_STACKOVERFLOW
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/* Debugging check for stack overflow: is there less than 1KB free? */
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{
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unsigned long sp;
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__asm__ __volatile__ ("mov %0, a1\n" : "=a" (sp));
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sp &= THREAD_SIZE - 1;
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if (unlikely(sp < (sizeof(thread_info) + 1024)))
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printk("Stack overflow in do_IRQ: %ld\n",
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sp - sizeof(struct thread_info));
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}
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#endif
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generic_handle_irq(irq);
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}
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int arch_show_interrupts(struct seq_file *p, int prec)
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{
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unsigned cpu __maybe_unused;
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#ifdef CONFIG_SMP
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show_ipi_list(p, prec);
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#endif
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#if XTENSA_FAKE_NMI
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seq_printf(p, "%*s:", prec, "NMI");
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for_each_online_cpu(cpu)
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seq_printf(p, " %10lu", per_cpu(nmi_count, cpu));
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seq_puts(p, " Non-maskable interrupts\n");
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#endif
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return 0;
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}
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int xtensa_irq_domain_xlate(const u32 *intspec, unsigned int intsize,
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unsigned long int_irq, unsigned long ext_irq,
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unsigned long *out_hwirq, unsigned int *out_type)
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{
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if (WARN_ON(intsize < 1 || intsize > 2))
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return -EINVAL;
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if (intsize == 2 && intspec[1] == 1) {
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int_irq = xtensa_map_ext_irq(ext_irq);
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if (int_irq < XCHAL_NUM_INTERRUPTS)
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*out_hwirq = int_irq;
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else
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return -EINVAL;
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} else {
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*out_hwirq = int_irq;
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}
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*out_type = IRQ_TYPE_NONE;
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return 0;
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}
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int xtensa_irq_map(struct irq_domain *d, unsigned int irq,
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irq_hw_number_t hw)
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{
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struct irq_chip *irq_chip = d->host_data;
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u32 mask = 1 << hw;
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if (mask & XCHAL_INTTYPE_MASK_SOFTWARE) {
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irq_set_chip_and_handler_name(irq, irq_chip,
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handle_simple_irq, "level");
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irq_set_status_flags(irq, IRQ_LEVEL);
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} else if (mask & XCHAL_INTTYPE_MASK_EXTERN_EDGE) {
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irq_set_chip_and_handler_name(irq, irq_chip,
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handle_edge_irq, "edge");
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irq_clear_status_flags(irq, IRQ_LEVEL);
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} else if (mask & XCHAL_INTTYPE_MASK_EXTERN_LEVEL) {
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irq_set_chip_and_handler_name(irq, irq_chip,
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handle_level_irq, "level");
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irq_set_status_flags(irq, IRQ_LEVEL);
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} else if (mask & XCHAL_INTTYPE_MASK_TIMER) {
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irq_set_chip_and_handler_name(irq, irq_chip,
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handle_percpu_irq, "timer");
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irq_clear_status_flags(irq, IRQ_LEVEL);
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#ifdef XCHAL_INTTYPE_MASK_PROFILING
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} else if (mask & XCHAL_INTTYPE_MASK_PROFILING) {
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irq_set_chip_and_handler_name(irq, irq_chip,
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handle_percpu_irq, "profiling");
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irq_set_status_flags(irq, IRQ_LEVEL);
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#endif
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} else {/* XCHAL_INTTYPE_MASK_WRITE_ERROR */
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/* XCHAL_INTTYPE_MASK_NMI */
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irq_set_chip_and_handler_name(irq, irq_chip,
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handle_level_irq, "level");
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irq_set_status_flags(irq, IRQ_LEVEL);
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}
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return 0;
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}
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unsigned xtensa_map_ext_irq(unsigned ext_irq)
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{
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unsigned mask = XCHAL_INTTYPE_MASK_EXTERN_EDGE |
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XCHAL_INTTYPE_MASK_EXTERN_LEVEL;
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unsigned i;
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for (i = 0; mask; ++i, mask >>= 1) {
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if ((mask & 1) && ext_irq-- == 0)
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return i;
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}
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return XCHAL_NUM_INTERRUPTS;
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}
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unsigned xtensa_get_ext_irq_no(unsigned irq)
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{
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unsigned mask = (XCHAL_INTTYPE_MASK_EXTERN_EDGE |
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XCHAL_INTTYPE_MASK_EXTERN_LEVEL) &
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((1u << irq) - 1);
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return hweight32(mask);
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}
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void __init init_IRQ(void)
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{
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#ifdef CONFIG_USE_OF
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irqchip_init();
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#else
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#ifdef CONFIG_HAVE_SMP
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xtensa_mx_init_legacy(NULL);
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#else
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xtensa_pic_init_legacy(NULL);
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#endif
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#endif
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#ifdef CONFIG_SMP
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ipi_init();
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#endif
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}
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#ifdef CONFIG_HOTPLUG_CPU
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/*
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* The CPU has been marked offline. Migrate IRQs off this CPU. If
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* the affinity settings do not allow other CPUs, force them onto any
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* available CPU.
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*/
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void migrate_irqs(void)
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{
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unsigned int i, cpu = smp_processor_id();
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for_each_active_irq(i) {
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struct irq_data *data = irq_get_irq_data(i);
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struct cpumask *mask;
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unsigned int newcpu;
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if (irqd_is_per_cpu(data))
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continue;
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mask = irq_data_get_affinity_mask(data);
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if (!cpumask_test_cpu(cpu, mask))
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continue;
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newcpu = cpumask_any_and(mask, cpu_online_mask);
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if (newcpu >= nr_cpu_ids) {
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pr_info_ratelimited("IRQ%u no longer affine to CPU%u\n",
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i, cpu);
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cpumask_setall(mask);
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}
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irq_set_affinity(i, mask);
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}
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}
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#endif /* CONFIG_HOTPLUG_CPU */
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