From a0ae2ba37ca479c6edddec8634b25686be965e0d Mon Sep 17 00:00:00 2001
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From: Peter Korsgaard <peter@korsgaard.com>
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Date: Mon, 27 Aug 2018 22:50:57 +0200
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Subject: [PATCH] bn_mul.h: fix x86 PIC inline ASM compilation with GCC < 5
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Fixes #1910
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With ebx added to the MULADDC_STOP clobber list to fix #1550, the inline
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assembly fails to build with GCC < 5 in PIC mode with the following error:
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include/mbedtls/bn_mul.h:46:13: error: PIC register clobbered by ‘ebx’ in ‘asm’
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This is because older GCC versions treated the x86 ebx register (which is
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used for the GOT) as a fixed reserved register when building as PIC.
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This is fixed by an improved register allocator in GCC 5+. From the release
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notes:
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Register allocation improvements: Reuse of the PIC hard register, instead of
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using a fixed register, was implemented on x86/x86-64 targets. This
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improves generated PIC code performance as more hard registers can be used.
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https://www.gnu.org/software/gcc/gcc-5/changes.html
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As a workaround, detect this situation and disable the inline assembly,
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similar to the MULADDC_CANNOT_USE_R7 logic.
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Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
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Upstream: https://github.com/ARMmbed/mbedtls/pull/1986
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---
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include/mbedtls/bn_mul.h | 18 +++++++++++++++++-
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1 file changed, 17 insertions(+), 1 deletion(-)
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diff --git a/include/mbedtls/bn_mul.h b/include/mbedtls/bn_mul.h
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index b587317d9..74a2d29be 100644
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--- a/include/mbedtls/bn_mul.h
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+++ b/include/mbedtls/bn_mul.h
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@@ -50,13 +50,29 @@
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#if defined(__GNUC__) && \
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( !defined(__ARMCC_VERSION) || __ARMCC_VERSION >= 6000000 )
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+/*
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+ * GCC < 5.0 treated the x86 ebx (which is used for the GOT) as a
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+ * fixed reserved register when building as PIC, leading to errors
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+ * like: bn_mul.h:46:13: error: PIC register clobbered by ‘ebx’ in ‘asm’
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+ *
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+ * This is fixed by an improved register allocator in GCC 5+. From the
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+ * release notes:
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+ * Register allocation improvements: Reuse of the PIC hard register,
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+ * instead of using a fixed register, was implemented on x86/x86-64
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+ * targets. This improves generated PIC code performance as more hard
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+ * registers can be used.
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+ */
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+#if defined(__GNUC__) && __GNUC__ < 5 && defined(__PIC__)
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+#define MULADDC_CANNOT_USE_EBX
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+#endif
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+
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/*
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* Disable use of the i386 assembly code below if option -O0, to disable all
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* compiler optimisations, is passed, detected with __OPTIMIZE__
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* This is done as the number of registers used in the assembly code doesn't
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* work with the -O0 option.
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*/
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-#if defined(__i386__) && defined(__OPTIMIZE__)
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+#if defined(__i386__) && defined(__OPTIMIZE__) && !defined(MULADDC_CANNOT_USE_EBX)
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#define MULADDC_INIT \
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asm( \
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--
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2.11.0
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