/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copied from the kernel sources:
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*
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* Copyright IBM Corp. 1999, 2009
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*
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* Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
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*/
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#ifndef __TOOLS_LINUX_ASM_BARRIER_H
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#define __TOOLS_LINUX_ASM_BARRIER_H
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/*
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* Force strict CPU ordering.
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* And yes, this is required on UP too when we're talking
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* to devices.
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*/
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#ifdef CONFIG_HAVE_MARCH_Z196_FEATURES
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/* Fast-BCR without checkpoint synchronization */
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#define __ASM_BARRIER "bcr 14,0\n"
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#else
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#define __ASM_BARRIER "bcr 15,0\n"
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#endif
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#define mb() do { asm volatile(__ASM_BARRIER : : : "memory"); } while (0)
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#define rmb() mb()
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#define wmb() mb()
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#define smp_store_release(p, v) \
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do { \
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barrier(); \
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WRITE_ONCE(*p, v); \
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} while (0)
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#define smp_load_acquire(p) \
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({ \
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typeof(*p) ___p1 = READ_ONCE(*p); \
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barrier(); \
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___p1; \
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})
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#endif /* __TOOLS_LIB_ASM_BARRIER_H */
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