/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Hantro VPU codec driver
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*
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* Copyright 2018 Google LLC.
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* Tomasz Figa <tfiga@chromium.org>
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*/
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#ifndef HANTRO_HW_H_
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#define HANTRO_HW_H_
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#include <linux/interrupt.h>
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#include <linux/v4l2-controls.h>
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#include <media/h264-ctrls.h>
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#include <media/mpeg2-ctrls.h>
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#include <media/vp8-ctrls.h>
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#include <media/videobuf2-core.h>
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#define DEC_8190_ALIGN_MASK 0x07U
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#define MB_DIM 16
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#define MB_WIDTH(w) DIV_ROUND_UP(w, MB_DIM)
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#define MB_HEIGHT(h) DIV_ROUND_UP(h, MB_DIM)
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struct hantro_dev;
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struct hantro_ctx;
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struct hantro_buf;
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struct hantro_variant;
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/**
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* struct hantro_aux_buf - auxiliary DMA buffer for hardware data
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* @cpu: CPU pointer to the buffer.
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* @dma: DMA address of the buffer.
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* @size: Size of the buffer.
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* @attrs: Attributes of the DMA mapping.
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*/
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struct hantro_aux_buf {
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void *cpu;
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dma_addr_t dma;
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size_t size;
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unsigned long attrs;
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};
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/**
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* struct hantro_jpeg_enc_hw_ctx
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* @bounce_buffer: Bounce buffer
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*/
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struct hantro_jpeg_enc_hw_ctx {
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struct hantro_aux_buf bounce_buffer;
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};
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/* Max. number of entries in the DPB (HW limitation). */
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#define HANTRO_H264_DPB_SIZE 16
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/**
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* struct hantro_h264_dec_ctrls
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* @decode: Decode params
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* @scaling: Scaling info
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* @sps: SPS info
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* @pps: PPS info
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*/
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struct hantro_h264_dec_ctrls {
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const struct v4l2_ctrl_h264_decode_params *decode;
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const struct v4l2_ctrl_h264_scaling_matrix *scaling;
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const struct v4l2_ctrl_h264_sps *sps;
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const struct v4l2_ctrl_h264_pps *pps;
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};
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/**
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* struct hantro_h264_dec_reflists
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* @p: P reflist
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* @b0: B0 reflist
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* @b1: B1 reflist
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*/
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struct hantro_h264_dec_reflists {
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u8 p[HANTRO_H264_DPB_SIZE];
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u8 b0[HANTRO_H264_DPB_SIZE];
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u8 b1[HANTRO_H264_DPB_SIZE];
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};
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/**
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* struct hantro_h264_dec_hw_ctx
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* @priv: Private auxiliary buffer for hardware.
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* @dpb: DPB
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* @reflists: P/B0/B1 reflists
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* @ctrls: V4L2 controls attached to a run
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*/
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struct hantro_h264_dec_hw_ctx {
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struct hantro_aux_buf priv;
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struct v4l2_h264_dpb_entry dpb[HANTRO_H264_DPB_SIZE];
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struct hantro_h264_dec_reflists reflists;
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struct hantro_h264_dec_ctrls ctrls;
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};
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/**
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* struct hantro_mpeg2_dec_hw_ctx
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* @qtable: Quantization table
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*/
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struct hantro_mpeg2_dec_hw_ctx {
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struct hantro_aux_buf qtable;
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};
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/**
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* struct hantro_vp8d_hw_ctx
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* @segment_map: Segment map buffer.
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* @prob_tbl: Probability table buffer.
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*/
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struct hantro_vp8_dec_hw_ctx {
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struct hantro_aux_buf segment_map;
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struct hantro_aux_buf prob_tbl;
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};
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/**
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* struct hantro_postproc_ctx
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*
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* @dec_q: References buffers, in decoder format.
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*/
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struct hantro_postproc_ctx {
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struct hantro_aux_buf dec_q[VB2_MAX_FRAME];
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};
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/**
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* struct hantro_codec_ops - codec mode specific operations
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*
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* @init: If needed, can be used for initialization.
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* Optional and called from process context.
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* @exit: If needed, can be used to undo the .init phase.
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* Optional and called from process context.
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* @run: Start single {en,de)coding job. Called from atomic context
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* to indicate that a pair of buffers is ready and the hardware
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* should be programmed and started.
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* @done: Read back processing results and additional data from hardware.
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* @reset: Reset the hardware in case of a timeout.
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*/
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struct hantro_codec_ops {
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int (*init)(struct hantro_ctx *ctx);
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void (*exit)(struct hantro_ctx *ctx);
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void (*run)(struct hantro_ctx *ctx);
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void (*done)(struct hantro_ctx *ctx);
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void (*reset)(struct hantro_ctx *ctx);
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};
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/**
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* enum hantro_enc_fmt - source format ID for hardware registers.
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*/
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enum hantro_enc_fmt {
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RK3288_VPU_ENC_FMT_YUV420P = 0,
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RK3288_VPU_ENC_FMT_YUV420SP = 1,
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RK3288_VPU_ENC_FMT_YUYV422 = 2,
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RK3288_VPU_ENC_FMT_UYVY422 = 3,
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};
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extern const struct hantro_variant rk3399_vpu_variant;
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extern const struct hantro_variant rk3328_vpu_variant;
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extern const struct hantro_variant rk3288_vpu_variant;
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extern const struct hantro_variant imx8mq_vpu_variant;
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extern const struct hantro_postproc_regs hantro_g1_postproc_regs;
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extern const u32 hantro_vp8_dec_mc_filter[8][6];
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void hantro_watchdog(struct work_struct *work);
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void hantro_run(struct hantro_ctx *ctx);
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void hantro_irq_done(struct hantro_dev *vpu,
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enum vb2_buffer_state result);
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void hantro_start_prepare_run(struct hantro_ctx *ctx);
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void hantro_end_prepare_run(struct hantro_ctx *ctx);
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void hantro_h1_jpeg_enc_run(struct hantro_ctx *ctx);
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void rk3399_vpu_jpeg_enc_run(struct hantro_ctx *ctx);
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int hantro_jpeg_enc_init(struct hantro_ctx *ctx);
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void hantro_jpeg_enc_exit(struct hantro_ctx *ctx);
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void hantro_jpeg_enc_done(struct hantro_ctx *ctx);
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dma_addr_t hantro_h264_get_ref_buf(struct hantro_ctx *ctx,
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unsigned int dpb_idx);
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int hantro_h264_dec_prepare_run(struct hantro_ctx *ctx);
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void hantro_g1_h264_dec_run(struct hantro_ctx *ctx);
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int hantro_h264_dec_init(struct hantro_ctx *ctx);
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void hantro_h264_dec_exit(struct hantro_ctx *ctx);
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static inline size_t
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hantro_h264_mv_size(unsigned int width, unsigned int height)
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{
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/*
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* A decoded 8-bit 4:2:0 NV12 frame may need memory for up to
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* 448 bytes per macroblock with additional 32 bytes on
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* multi-core variants.
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*
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* The H264 decoder needs extra space on the output buffers
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* to store motion vectors. This is needed for reference
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* frames and only if the format is non-post-processed NV12.
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*
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* Memory layout is as follow:
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*
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* +---------------------------+
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* | Y-plane 256 bytes x MBs |
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* +---------------------------+
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* | UV-plane 128 bytes x MBs |
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* +---------------------------+
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* | MV buffer 64 bytes x MBs |
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* +---------------------------+
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* | MC sync 32 bytes |
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* +---------------------------+
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*/
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return 64 * MB_WIDTH(width) * MB_WIDTH(height) + 32;
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}
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void hantro_g1_mpeg2_dec_run(struct hantro_ctx *ctx);
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void rk3399_vpu_mpeg2_dec_run(struct hantro_ctx *ctx);
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void hantro_mpeg2_dec_copy_qtable(u8 *qtable,
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const struct v4l2_ctrl_mpeg2_quantization *ctrl);
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int hantro_mpeg2_dec_init(struct hantro_ctx *ctx);
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void hantro_mpeg2_dec_exit(struct hantro_ctx *ctx);
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void hantro_g1_vp8_dec_run(struct hantro_ctx *ctx);
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void rk3399_vpu_vp8_dec_run(struct hantro_ctx *ctx);
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int hantro_vp8_dec_init(struct hantro_ctx *ctx);
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void hantro_vp8_dec_exit(struct hantro_ctx *ctx);
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void hantro_vp8_prob_update(struct hantro_ctx *ctx,
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const struct v4l2_ctrl_vp8_frame_header *hdr);
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#endif /* HANTRO_HW_H_ */
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