// SPDX-License-Identifier: GPL-2.0
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/*
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* Device driver for regulators in HISI PMIC IC
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*
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* Copyright (c) 2013 Linaro Ltd.
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* Copyright (c) 2011 Hisilicon.
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/hi6421-spmi-pmic.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/of_gpio.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/spmi.h>
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/* 8-bit register offset in PMIC */
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#define HISI_MASK_STATE 0xff
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#define HISI_IRQ_ARRAY 2
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#define HISI_IRQ_NUM (HISI_IRQ_ARRAY * 8)
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#define SOC_PMIC_IRQ_MASK_0_ADDR 0x0202
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#define SOC_PMIC_IRQ0_ADDR 0x0212
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#define HISI_IRQ_KEY_NUM 0
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#define HISI_IRQ_KEY_VALUE 0xc0
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#define HISI_IRQ_KEY_DOWN 7
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#define HISI_IRQ_KEY_UP 6
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#define HISI_MASK_FIELD 0xFF
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#define HISI_BITS 8
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/*define the first group interrupt register number*/
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#define HISI_PMIC_FIRST_GROUP_INT_NUM 2
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static const struct mfd_cell hi6421v600_devs[] = {
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{ .name = "hi6421v600-regulator", },
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};
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/*
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* The PMIC register is only 8-bit.
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* Hisilicon SoC use hardware to map PMIC register into SoC mapping.
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* At here, we are accessing SoC register with 32-bit.
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*/
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int hi6421_spmi_pmic_read(struct hi6421_spmi_pmic *pmic, int reg)
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{
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struct spmi_device *pdev;
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u8 read_value = 0;
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u32 ret;
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pdev = to_spmi_device(pmic->dev);
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if (!pdev) {
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pr_err("%s: pdev get failed!\n", __func__);
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return -ENODEV;
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}
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ret = spmi_ext_register_readl(pdev, reg, &read_value, 1);
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if (ret) {
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pr_err("%s: spmi_ext_register_readl failed!\n", __func__);
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return ret;
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}
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return read_value;
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}
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EXPORT_SYMBOL(hi6421_spmi_pmic_read);
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int hi6421_spmi_pmic_write(struct hi6421_spmi_pmic *pmic, int reg, u32 val)
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{
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struct spmi_device *pdev;
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u32 ret;
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pdev = to_spmi_device(pmic->dev);
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if (!pdev) {
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pr_err("%s: pdev get failed!\n", __func__);
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return -ENODEV;
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}
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ret = spmi_ext_register_writel(pdev, reg, (unsigned char *)&val, 1);
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if (ret)
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pr_err("%s: spmi_ext_register_writel failed!\n", __func__);
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return ret;
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}
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EXPORT_SYMBOL(hi6421_spmi_pmic_write);
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int hi6421_spmi_pmic_rmw(struct hi6421_spmi_pmic *pmic, int reg,
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u32 mask, u32 bits)
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{
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unsigned long flags;
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u32 data;
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int ret;
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spin_lock_irqsave(&pmic->lock, flags);
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data = hi6421_spmi_pmic_read(pmic, reg) & ~mask;
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data |= mask & bits;
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ret = hi6421_spmi_pmic_write(pmic, reg, data);
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spin_unlock_irqrestore(&pmic->lock, flags);
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return ret;
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}
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EXPORT_SYMBOL(hi6421_spmi_pmic_rmw);
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static irqreturn_t hi6421_spmi_irq_handler(int irq, void *data)
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{
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struct hi6421_spmi_pmic *pmic = (struct hi6421_spmi_pmic *)data;
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unsigned long pending;
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int i, offset;
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for (i = 0; i < HISI_IRQ_ARRAY; i++) {
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pending = hi6421_spmi_pmic_read(pmic, (i + SOC_PMIC_IRQ0_ADDR));
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pending &= HISI_MASK_FIELD;
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if (pending != 0)
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pr_debug("pending[%d]=0x%lx\n\r", i, pending);
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hi6421_spmi_pmic_write(pmic, (i + SOC_PMIC_IRQ0_ADDR), pending);
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/* solve powerkey order */
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if ((i == HISI_IRQ_KEY_NUM) &&
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((pending & HISI_IRQ_KEY_VALUE) == HISI_IRQ_KEY_VALUE)) {
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generic_handle_irq(pmic->irqs[HISI_IRQ_KEY_DOWN]);
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generic_handle_irq(pmic->irqs[HISI_IRQ_KEY_UP]);
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pending &= (~HISI_IRQ_KEY_VALUE);
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}
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if (pending) {
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for_each_set_bit(offset, &pending, HISI_BITS)
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generic_handle_irq(pmic->irqs[offset + i * HISI_BITS]);
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}
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}
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return IRQ_HANDLED;
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}
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static void hi6421_spmi_irq_mask(struct irq_data *d)
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{
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struct hi6421_spmi_pmic *pmic = irq_data_get_irq_chip_data(d);
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u32 data, offset;
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unsigned long flags;
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offset = (irqd_to_hwirq(d) >> 3);
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offset += SOC_PMIC_IRQ_MASK_0_ADDR;
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spin_lock_irqsave(&pmic->lock, flags);
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data = hi6421_spmi_pmic_read(pmic, offset);
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data |= (1 << (irqd_to_hwirq(d) & 0x07));
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hi6421_spmi_pmic_write(pmic, offset, data);
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spin_unlock_irqrestore(&pmic->lock, flags);
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}
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static void hi6421_spmi_irq_unmask(struct irq_data *d)
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{
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struct hi6421_spmi_pmic *pmic = irq_data_get_irq_chip_data(d);
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u32 data, offset;
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unsigned long flags;
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offset = (irqd_to_hwirq(d) >> 3);
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offset += SOC_PMIC_IRQ_MASK_0_ADDR;
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spin_lock_irqsave(&pmic->lock, flags);
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data = hi6421_spmi_pmic_read(pmic, offset);
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data &= ~(1 << (irqd_to_hwirq(d) & 0x07));
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hi6421_spmi_pmic_write(pmic, offset, data);
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spin_unlock_irqrestore(&pmic->lock, flags);
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}
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static struct irq_chip hi6421_spmi_pmu_irqchip = {
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.name = "hisi-irq",
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.irq_mask = hi6421_spmi_irq_mask,
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.irq_unmask = hi6421_spmi_irq_unmask,
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.irq_disable = hi6421_spmi_irq_mask,
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.irq_enable = hi6421_spmi_irq_unmask,
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};
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static int hi6421_spmi_irq_map(struct irq_domain *d, unsigned int virq,
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irq_hw_number_t hw)
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{
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struct hi6421_spmi_pmic *pmic = d->host_data;
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irq_set_chip_and_handler_name(virq, &hi6421_spmi_pmu_irqchip,
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handle_simple_irq, "hisi");
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irq_set_chip_data(virq, pmic);
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irq_set_irq_type(virq, IRQ_TYPE_NONE);
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return 0;
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}
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static const struct irq_domain_ops hi6421_spmi_domain_ops = {
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.map = hi6421_spmi_irq_map,
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.xlate = irq_domain_xlate_twocell,
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};
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static void hi6421_spmi_pmic_irq_prc(struct hi6421_spmi_pmic *pmic)
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{
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int i, pending;
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for (i = 0 ; i < HISI_IRQ_ARRAY; i++)
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hi6421_spmi_pmic_write(pmic, SOC_PMIC_IRQ_MASK_0_ADDR + i,
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HISI_MASK_STATE);
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for (i = 0 ; i < HISI_IRQ_ARRAY; i++) {
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pending = hi6421_spmi_pmic_read(pmic, SOC_PMIC_IRQ0_ADDR + i);
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pr_debug("PMU IRQ address value:irq[0x%x] = 0x%x\n",
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SOC_PMIC_IRQ0_ADDR + i, pending);
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hi6421_spmi_pmic_write(pmic, SOC_PMIC_IRQ0_ADDR + i,
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HISI_MASK_STATE);
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}
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}
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static int hi6421_spmi_pmic_probe(struct spmi_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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struct hi6421_spmi_pmic *pmic;
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unsigned int virq;
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int ret, i;
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pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL);
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if (!pmic)
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return -ENOMEM;
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spin_lock_init(&pmic->lock);
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pmic->dev = dev;
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pmic->gpio = of_get_gpio(np, 0);
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if (pmic->gpio < 0)
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return pmic->gpio;
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if (!gpio_is_valid(pmic->gpio))
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return -EINVAL;
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ret = devm_gpio_request_one(dev, pmic->gpio, GPIOF_IN, "pmic");
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if (ret < 0) {
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dev_err(dev, "failed to request gpio%d\n", pmic->gpio);
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return ret;
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}
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pmic->irq = gpio_to_irq(pmic->gpio);
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hi6421_spmi_pmic_irq_prc(pmic);
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pmic->irqs = devm_kzalloc(dev, HISI_IRQ_NUM * sizeof(int), GFP_KERNEL);
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if (!pmic->irqs) {
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ret = -ENOMEM;
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goto irq_malloc;
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}
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pmic->domain = irq_domain_add_simple(np, HISI_IRQ_NUM, 0,
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&hi6421_spmi_domain_ops, pmic);
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if (!pmic->domain) {
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dev_err(dev, "failed irq domain add simple!\n");
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ret = -ENODEV;
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goto irq_malloc;
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}
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for (i = 0; i < HISI_IRQ_NUM; i++) {
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virq = irq_create_mapping(pmic->domain, i);
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if (!virq) {
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dev_err(dev, "Failed mapping hwirq\n");
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ret = -ENOSPC;
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goto irq_malloc;
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}
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pmic->irqs[i] = virq;
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dev_dbg(dev, "%s: pmic->irqs[%d] = %d\n",
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__func__, i, pmic->irqs[i]);
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}
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ret = request_threaded_irq(pmic->irq, hi6421_spmi_irq_handler, NULL,
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IRQF_TRIGGER_LOW | IRQF_SHARED | IRQF_NO_SUSPEND,
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"pmic", pmic);
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if (ret < 0) {
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dev_err(dev, "could not claim pmic IRQ: error %d\n", ret);
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goto irq_malloc;
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}
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dev_set_drvdata(&pdev->dev, pmic);
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/*
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* The logic below will rely that the pmic is already stored at
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* drvdata.
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*/
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dev_dbg(&pdev->dev, "SPMI-PMIC: adding children for %pOF\n",
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pdev->dev.of_node);
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ret = devm_mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE,
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hi6421v600_devs, ARRAY_SIZE(hi6421v600_devs),
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NULL, 0, NULL);
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if (!ret)
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return 0;
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dev_err(dev, "Failed to add child devices: %d\n", ret);
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irq_malloc:
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free_irq(pmic->irq, pmic);
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return ret;
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}
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static void hi6421_spmi_pmic_remove(struct spmi_device *pdev)
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{
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struct hi6421_spmi_pmic *pmic = dev_get_drvdata(&pdev->dev);
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free_irq(pmic->irq, pmic);
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}
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static const struct of_device_id pmic_spmi_id_table[] = {
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{ .compatible = "hisilicon,hi6421-spmi" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, pmic_spmi_id_table);
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static struct spmi_driver hi6421_spmi_pmic_driver = {
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.driver = {
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.name = "hi6421-spmi-pmic",
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.of_match_table = pmic_spmi_id_table,
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},
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.probe = hi6421_spmi_pmic_probe,
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.remove = hi6421_spmi_pmic_remove,
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};
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module_spmi_driver(hi6421_spmi_pmic_driver);
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MODULE_DESCRIPTION("HiSilicon Hi6421v600 SPMI PMIC driver");
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MODULE_LICENSE("GPL v2");
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