// SPDX-License-Identifier: GPL-2.0
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/*
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* Intel Speed Select Interface: Mbox via PCI Interface
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* Copyright (c) 2019, Intel Corporation.
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* All rights reserved.
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*
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* Author: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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*/
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#include <linux/cpufeature.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/sched/signal.h>
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#include <linux/uaccess.h>
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#include <uapi/linux/isst_if.h>
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#include "isst_if_common.h"
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#define PUNIT_MAILBOX_DATA 0xA0
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#define PUNIT_MAILBOX_INTERFACE 0xA4
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#define PUNIT_MAILBOX_BUSY_BIT 31
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/*
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* The average time to complete mailbox commands is less than 40us. Most of
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* the commands complete in few micro seconds. But the same firmware handles
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* requests from all power management features.
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* We can create a scenario where we flood the firmware with requests then
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* the mailbox response can be delayed for 100s of micro seconds. So define
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* two timeouts. One for average case and one for long.
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* If the firmware is taking more than average, just call cond_resched().
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*/
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#define OS_MAILBOX_TIMEOUT_AVG_US 40
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#define OS_MAILBOX_TIMEOUT_MAX_US 1000
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struct isst_if_device {
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struct mutex mutex;
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};
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static int isst_if_mbox_cmd(struct pci_dev *pdev,
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struct isst_if_mbox_cmd *mbox_cmd)
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{
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s64 tm_delta = 0;
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ktime_t tm;
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u32 data;
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int ret;
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/* Poll for rb bit == 0 */
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tm = ktime_get();
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do {
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ret = pci_read_config_dword(pdev, PUNIT_MAILBOX_INTERFACE,
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&data);
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if (ret)
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return ret;
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if (data & BIT_ULL(PUNIT_MAILBOX_BUSY_BIT)) {
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ret = -EBUSY;
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tm_delta = ktime_us_delta(ktime_get(), tm);
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if (tm_delta > OS_MAILBOX_TIMEOUT_AVG_US)
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cond_resched();
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continue;
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}
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ret = 0;
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break;
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} while (tm_delta < OS_MAILBOX_TIMEOUT_MAX_US);
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if (ret)
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return ret;
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/* Write DATA register */
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ret = pci_write_config_dword(pdev, PUNIT_MAILBOX_DATA,
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mbox_cmd->req_data);
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if (ret)
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return ret;
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/* Write command register */
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data = BIT_ULL(PUNIT_MAILBOX_BUSY_BIT) |
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(mbox_cmd->parameter & GENMASK_ULL(13, 0)) << 16 |
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(mbox_cmd->sub_command << 8) |
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mbox_cmd->command;
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ret = pci_write_config_dword(pdev, PUNIT_MAILBOX_INTERFACE, data);
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if (ret)
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return ret;
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/* Poll for rb bit == 0 */
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tm_delta = 0;
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tm = ktime_get();
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do {
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ret = pci_read_config_dword(pdev, PUNIT_MAILBOX_INTERFACE,
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&data);
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if (ret)
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return ret;
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if (data & BIT_ULL(PUNIT_MAILBOX_BUSY_BIT)) {
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ret = -EBUSY;
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tm_delta = ktime_us_delta(ktime_get(), tm);
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if (tm_delta > OS_MAILBOX_TIMEOUT_AVG_US)
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cond_resched();
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continue;
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}
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if (data & 0xff)
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return -ENXIO;
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ret = pci_read_config_dword(pdev, PUNIT_MAILBOX_DATA, &data);
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if (ret)
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return ret;
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mbox_cmd->resp_data = data;
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ret = 0;
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break;
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} while (tm_delta < OS_MAILBOX_TIMEOUT_MAX_US);
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return ret;
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}
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static long isst_if_mbox_proc_cmd(u8 *cmd_ptr, int *write_only, int resume)
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{
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struct isst_if_mbox_cmd *mbox_cmd;
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struct isst_if_device *punit_dev;
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struct pci_dev *pdev;
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int ret;
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mbox_cmd = (struct isst_if_mbox_cmd *)cmd_ptr;
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if (isst_if_mbox_cmd_invalid(mbox_cmd))
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return -EINVAL;
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if (isst_if_mbox_cmd_set_req(mbox_cmd) && !capable(CAP_SYS_ADMIN))
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return -EPERM;
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pdev = isst_if_get_pci_dev(mbox_cmd->logical_cpu, 1, 30, 1);
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if (!pdev)
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return -EINVAL;
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punit_dev = pci_get_drvdata(pdev);
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if (!punit_dev)
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return -EINVAL;
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/*
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* Basically we are allowing one complete mailbox transaction on
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* a mapped PCI device at a time.
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*/
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mutex_lock(&punit_dev->mutex);
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ret = isst_if_mbox_cmd(pdev, mbox_cmd);
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if (!ret && !resume && isst_if_mbox_cmd_set_req(mbox_cmd))
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ret = isst_store_cmd(mbox_cmd->command,
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mbox_cmd->sub_command,
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mbox_cmd->logical_cpu, 1,
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mbox_cmd->parameter,
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mbox_cmd->req_data);
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mutex_unlock(&punit_dev->mutex);
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if (ret)
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return ret;
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*write_only = 0;
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return 0;
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}
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static const struct pci_device_id isst_if_mbox_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, INTEL_CFG_MBOX_DEVID_0)},
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, INTEL_CFG_MBOX_DEVID_1)},
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{ 0 },
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};
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MODULE_DEVICE_TABLE(pci, isst_if_mbox_ids);
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static int isst_if_mbox_probe(struct pci_dev *pdev,
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const struct pci_device_id *ent)
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{
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struct isst_if_device *punit_dev;
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struct isst_if_cmd_cb cb;
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int ret;
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punit_dev = devm_kzalloc(&pdev->dev, sizeof(*punit_dev), GFP_KERNEL);
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if (!punit_dev)
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return -ENOMEM;
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ret = pcim_enable_device(pdev);
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if (ret)
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return ret;
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mutex_init(&punit_dev->mutex);
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pci_set_drvdata(pdev, punit_dev);
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memset(&cb, 0, sizeof(cb));
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cb.cmd_size = sizeof(struct isst_if_mbox_cmd);
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cb.offset = offsetof(struct isst_if_mbox_cmds, mbox_cmd);
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cb.cmd_callback = isst_if_mbox_proc_cmd;
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cb.owner = THIS_MODULE;
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ret = isst_if_cdev_register(ISST_IF_DEV_MBOX, &cb);
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if (ret)
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mutex_destroy(&punit_dev->mutex);
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return ret;
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}
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static void isst_if_mbox_remove(struct pci_dev *pdev)
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{
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struct isst_if_device *punit_dev;
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punit_dev = pci_get_drvdata(pdev);
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isst_if_cdev_unregister(ISST_IF_DEV_MBOX);
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mutex_destroy(&punit_dev->mutex);
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}
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static int __maybe_unused isst_if_resume(struct device *device)
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{
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isst_resume_common();
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return 0;
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}
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static SIMPLE_DEV_PM_OPS(isst_if_pm_ops, NULL, isst_if_resume);
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static struct pci_driver isst_if_pci_driver = {
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.name = "isst_if_mbox_pci",
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.id_table = isst_if_mbox_ids,
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.probe = isst_if_mbox_probe,
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.remove = isst_if_mbox_remove,
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.driver.pm = &isst_if_pm_ops,
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};
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module_pci_driver(isst_if_pci_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Intel speed select interface pci mailbox driver");
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