/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2019, Intel Corporation. */
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#ifndef _ICE_FLEX_TYPE_H_
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#define _ICE_FLEX_TYPE_H_
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#define ICE_FV_OFFSET_INVAL 0x1FF
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/* Extraction Sequence (Field Vector) Table */
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struct ice_fv_word {
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u8 prot_id;
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u16 off; /* Offset within the protocol header */
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u8 resvrd;
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} __packed;
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#define ICE_MAX_FV_WORDS 48
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struct ice_fv {
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struct ice_fv_word ew[ICE_MAX_FV_WORDS];
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};
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/* Package and segment headers and tables */
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struct ice_pkg_hdr {
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struct ice_pkg_ver pkg_format_ver;
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__le32 seg_count;
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__le32 seg_offset[];
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};
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/* generic segment */
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struct ice_generic_seg_hdr {
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#define SEGMENT_TYPE_METADATA 0x00000001
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#define SEGMENT_TYPE_ICE 0x00000010
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__le32 seg_type;
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struct ice_pkg_ver seg_format_ver;
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__le32 seg_size;
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char seg_id[ICE_PKG_NAME_SIZE];
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};
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/* ice specific segment */
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union ice_device_id {
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struct {
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__le16 device_id;
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__le16 vendor_id;
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} dev_vend_id;
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__le32 id;
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};
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struct ice_device_id_entry {
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union ice_device_id device;
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union ice_device_id sub_device;
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};
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struct ice_seg {
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struct ice_generic_seg_hdr hdr;
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__le32 device_table_count;
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struct ice_device_id_entry device_table[];
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};
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struct ice_nvm_table {
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__le32 table_count;
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__le32 vers[];
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};
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struct ice_buf {
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#define ICE_PKG_BUF_SIZE 4096
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u8 buf[ICE_PKG_BUF_SIZE];
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};
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struct ice_buf_table {
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__le32 buf_count;
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struct ice_buf buf_array[];
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};
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/* global metadata specific segment */
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struct ice_global_metadata_seg {
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struct ice_generic_seg_hdr hdr;
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struct ice_pkg_ver pkg_ver;
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__le32 rsvd;
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char pkg_name[ICE_PKG_NAME_SIZE];
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};
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#define ICE_MIN_S_OFF 12
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#define ICE_MAX_S_OFF 4095
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#define ICE_MIN_S_SZ 1
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#define ICE_MAX_S_SZ 4084
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/* section information */
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struct ice_section_entry {
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__le32 type;
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__le16 offset;
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__le16 size;
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};
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#define ICE_MIN_S_COUNT 1
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#define ICE_MAX_S_COUNT 511
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#define ICE_MIN_S_DATA_END 12
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#define ICE_MAX_S_DATA_END 4096
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#define ICE_METADATA_BUF 0x80000000
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struct ice_buf_hdr {
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__le16 section_count;
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__le16 data_end;
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struct ice_section_entry section_entry[];
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};
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#define ICE_MAX_ENTRIES_IN_BUF(hd_sz, ent_sz) ((ICE_PKG_BUF_SIZE - \
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struct_size((struct ice_buf_hdr *)0, section_entry, 1) - (hd_sz)) /\
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(ent_sz))
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/* ice package section IDs */
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#define ICE_SID_XLT0_SW 10
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#define ICE_SID_XLT_KEY_BUILDER_SW 11
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#define ICE_SID_XLT1_SW 12
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#define ICE_SID_XLT2_SW 13
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#define ICE_SID_PROFID_TCAM_SW 14
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#define ICE_SID_PROFID_REDIR_SW 15
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#define ICE_SID_FLD_VEC_SW 16
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#define ICE_SID_CDID_KEY_BUILDER_SW 17
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#define ICE_SID_CDID_REDIR_SW 18
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#define ICE_SID_XLT0_ACL 20
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#define ICE_SID_XLT_KEY_BUILDER_ACL 21
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#define ICE_SID_XLT1_ACL 22
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#define ICE_SID_XLT2_ACL 23
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#define ICE_SID_PROFID_TCAM_ACL 24
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#define ICE_SID_PROFID_REDIR_ACL 25
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#define ICE_SID_FLD_VEC_ACL 26
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#define ICE_SID_CDID_KEY_BUILDER_ACL 27
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#define ICE_SID_CDID_REDIR_ACL 28
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#define ICE_SID_XLT0_FD 30
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#define ICE_SID_XLT_KEY_BUILDER_FD 31
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#define ICE_SID_XLT1_FD 32
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#define ICE_SID_XLT2_FD 33
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#define ICE_SID_PROFID_TCAM_FD 34
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#define ICE_SID_PROFID_REDIR_FD 35
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#define ICE_SID_FLD_VEC_FD 36
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#define ICE_SID_CDID_KEY_BUILDER_FD 37
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#define ICE_SID_CDID_REDIR_FD 38
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#define ICE_SID_XLT0_RSS 40
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#define ICE_SID_XLT_KEY_BUILDER_RSS 41
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#define ICE_SID_XLT1_RSS 42
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#define ICE_SID_XLT2_RSS 43
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#define ICE_SID_PROFID_TCAM_RSS 44
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#define ICE_SID_PROFID_REDIR_RSS 45
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#define ICE_SID_FLD_VEC_RSS 46
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#define ICE_SID_CDID_KEY_BUILDER_RSS 47
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#define ICE_SID_CDID_REDIR_RSS 48
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#define ICE_SID_RXPARSER_BOOST_TCAM 56
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#define ICE_SID_TXPARSER_BOOST_TCAM 66
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#define ICE_SID_XLT0_PE 80
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#define ICE_SID_XLT_KEY_BUILDER_PE 81
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#define ICE_SID_XLT1_PE 82
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#define ICE_SID_XLT2_PE 83
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#define ICE_SID_PROFID_TCAM_PE 84
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#define ICE_SID_PROFID_REDIR_PE 85
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#define ICE_SID_FLD_VEC_PE 86
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#define ICE_SID_CDID_KEY_BUILDER_PE 87
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#define ICE_SID_CDID_REDIR_PE 88
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/* Label Metadata section IDs */
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#define ICE_SID_LBL_FIRST 0x80000010
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#define ICE_SID_LBL_RXPARSER_TMEM 0x80000018
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/* The following define MUST be updated to reflect the last label section ID */
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#define ICE_SID_LBL_LAST 0x80000038
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enum ice_block {
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ICE_BLK_SW = 0,
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ICE_BLK_ACL,
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ICE_BLK_FD,
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ICE_BLK_RSS,
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ICE_BLK_PE,
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ICE_BLK_COUNT
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};
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enum ice_sect {
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ICE_XLT0 = 0,
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ICE_XLT_KB,
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ICE_XLT1,
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ICE_XLT2,
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ICE_PROF_TCAM,
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ICE_PROF_REDIR,
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ICE_VEC_TBL,
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ICE_CDID_KB,
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ICE_CDID_REDIR,
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ICE_SECT_COUNT
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};
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/* package labels */
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struct ice_label {
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__le16 value;
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#define ICE_PKG_LABEL_SIZE 64
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char name[ICE_PKG_LABEL_SIZE];
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};
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struct ice_label_section {
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__le16 count;
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struct ice_label label[];
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};
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#define ICE_MAX_LABELS_IN_BUF ICE_MAX_ENTRIES_IN_BUF( \
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struct_size((struct ice_label_section *)0, label, 1) - \
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sizeof(struct ice_label), sizeof(struct ice_label))
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struct ice_sw_fv_section {
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__le16 count;
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__le16 base_offset;
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struct ice_fv fv[];
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};
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/* The BOOST TCAM stores the match packet header in reverse order, meaning
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* the fields are reversed; in addition, this means that the normally big endian
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* fields of the packet are now little endian.
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*/
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struct ice_boost_key_value {
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#define ICE_BOOST_REMAINING_HV_KEY 15
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u8 remaining_hv_key[ICE_BOOST_REMAINING_HV_KEY];
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__le16 hv_dst_port_key;
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__le16 hv_src_port_key;
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u8 tcam_search_key;
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} __packed;
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struct ice_boost_key {
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struct ice_boost_key_value key;
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struct ice_boost_key_value key2;
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};
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/* package Boost TCAM entry */
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struct ice_boost_tcam_entry {
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__le16 addr;
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__le16 reserved;
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/* break up the 40 bytes of key into different fields */
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struct ice_boost_key key;
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u8 boost_hit_index_group;
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/* The following contains bitfields which are not on byte boundaries.
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* These fields are currently unused by driver software.
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*/
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#define ICE_BOOST_BIT_FIELDS 43
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u8 bit_fields[ICE_BOOST_BIT_FIELDS];
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};
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struct ice_boost_tcam_section {
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__le16 count;
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__le16 reserved;
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struct ice_boost_tcam_entry tcam[];
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};
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#define ICE_MAX_BST_TCAMS_IN_BUF ICE_MAX_ENTRIES_IN_BUF( \
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struct_size((struct ice_boost_tcam_section *)0, tcam, 1) - \
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sizeof(struct ice_boost_tcam_entry), \
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sizeof(struct ice_boost_tcam_entry))
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struct ice_xlt1_section {
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__le16 count;
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__le16 offset;
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u8 value[];
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};
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struct ice_xlt2_section {
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__le16 count;
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__le16 offset;
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__le16 value[];
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};
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struct ice_prof_redir_section {
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__le16 count;
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__le16 offset;
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u8 redir_value[];
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};
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/* package buffer building */
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struct ice_buf_build {
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struct ice_buf buf;
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u16 reserved_section_table_entries;
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};
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struct ice_pkg_enum {
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struct ice_buf_table *buf_table;
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u32 buf_idx;
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u32 type;
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struct ice_buf_hdr *buf;
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u32 sect_idx;
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void *sect;
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u32 sect_type;
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u32 entry_idx;
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void *(*handler)(u32 sect_type, void *section, u32 index, u32 *offset);
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};
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/* Tunnel enabling */
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enum ice_tunnel_type {
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TNL_VXLAN = 0,
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TNL_GENEVE,
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__TNL_TYPE_CNT,
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TNL_LAST = 0xFF,
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TNL_ALL = 0xFF,
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};
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struct ice_tunnel_type_scan {
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enum ice_tunnel_type type;
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const char *label_prefix;
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};
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struct ice_tunnel_entry {
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enum ice_tunnel_type type;
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u16 boost_addr;
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u16 port;
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struct ice_boost_tcam_entry *boost_entry;
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u8 valid;
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};
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#define ICE_TUNNEL_MAX_ENTRIES 16
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struct ice_tunnel_table {
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struct ice_tunnel_entry tbl[ICE_TUNNEL_MAX_ENTRIES];
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u16 count;
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u16 valid_count[__TNL_TYPE_CNT];
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};
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struct ice_pkg_es {
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__le16 count;
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__le16 offset;
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struct ice_fv_word es[];
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};
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struct ice_es {
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u32 sid;
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u16 count;
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u16 fvw;
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u16 *ref_count;
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struct list_head prof_map;
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struct ice_fv_word *t;
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struct mutex prof_map_lock; /* protect access to profiles list */
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u8 *written;
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u8 reverse; /* set to true to reverse FV order */
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};
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/* PTYPE Group management */
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/* Note: XLT1 table takes 13-bit as input, and results in an 8-bit packet type
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* group (PTG) ID as output.
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*
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* Note: PTG 0 is the default packet type group and it is assumed that all PTYPE
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* are a part of this group until moved to a new PTG.
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*/
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#define ICE_DEFAULT_PTG 0
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struct ice_ptg_entry {
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struct ice_ptg_ptype *first_ptype;
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u8 in_use;
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};
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struct ice_ptg_ptype {
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struct ice_ptg_ptype *next_ptype;
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u8 ptg;
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};
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#define ICE_MAX_TCAM_PER_PROFILE 32
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#define ICE_MAX_PTG_PER_PROFILE 32
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struct ice_prof_map {
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struct list_head list;
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u64 profile_cookie;
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u64 context;
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u8 prof_id;
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u8 ptg_cnt;
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u8 ptg[ICE_MAX_PTG_PER_PROFILE];
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};
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#define ICE_INVALID_TCAM 0xFFFF
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struct ice_tcam_inf {
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u16 tcam_idx;
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u8 ptg;
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u8 prof_id;
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u8 in_use;
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};
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struct ice_vsig_prof {
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struct list_head list;
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u64 profile_cookie;
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u8 prof_id;
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u8 tcam_count;
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struct ice_tcam_inf tcam[ICE_MAX_TCAM_PER_PROFILE];
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};
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struct ice_vsig_entry {
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struct list_head prop_lst;
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struct ice_vsig_vsi *first_vsi;
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u8 in_use;
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};
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struct ice_vsig_vsi {
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struct ice_vsig_vsi *next_vsi;
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u32 prop_mask;
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u16 changed;
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u16 vsig;
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};
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#define ICE_XLT1_CNT 1024
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#define ICE_MAX_PTGS 256
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/* XLT1 Table */
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struct ice_xlt1 {
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struct ice_ptg_entry *ptg_tbl;
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struct ice_ptg_ptype *ptypes;
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u8 *t;
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u32 sid;
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u16 count;
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};
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#define ICE_XLT2_CNT 768
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#define ICE_MAX_VSIGS 768
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/* VSIG bit layout:
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* [0:12]: incremental VSIG index 1 to ICE_MAX_VSIGS
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* [13:15]: PF number of device
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*/
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#define ICE_VSIG_IDX_M (0x1FFF)
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#define ICE_PF_NUM_S 13
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#define ICE_PF_NUM_M (0x07 << ICE_PF_NUM_S)
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#define ICE_VSIG_VALUE(vsig, pf_id) \
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(u16)((((u16)(vsig)) & ICE_VSIG_IDX_M) | \
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(((u16)(pf_id) << ICE_PF_NUM_S) & ICE_PF_NUM_M))
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#define ICE_DEFAULT_VSIG 0
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/* XLT2 Table */
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struct ice_xlt2 {
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struct ice_vsig_entry *vsig_tbl;
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struct ice_vsig_vsi *vsis;
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u16 *t;
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u32 sid;
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u16 count;
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};
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/* Profile ID Management */
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struct ice_prof_id_key {
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__le16 flags;
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u8 xlt1;
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__le16 xlt2_cdid;
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} __packed;
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/* Keys are made up of two values, each one-half the size of the key.
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* For TCAM, the entire key is 80 bits wide (or 2, 40-bit wide values)
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*/
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#define ICE_TCAM_KEY_VAL_SZ 5
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#define ICE_TCAM_KEY_SZ (2 * ICE_TCAM_KEY_VAL_SZ)
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struct ice_prof_tcam_entry {
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__le16 addr;
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u8 key[ICE_TCAM_KEY_SZ];
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u8 prof_id;
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} __packed;
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struct ice_prof_id_section {
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__le16 count;
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struct ice_prof_tcam_entry entry[];
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};
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struct ice_prof_tcam {
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u32 sid;
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u16 count;
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u16 max_prof_id;
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struct ice_prof_tcam_entry *t;
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u8 cdid_bits; /* # CDID bits to use in key, 0, 2, 4, or 8 */
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};
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struct ice_prof_redir {
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u8 *t;
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u32 sid;
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u16 count;
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};
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/* Tables per block */
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struct ice_blk_info {
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struct ice_xlt1 xlt1;
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struct ice_xlt2 xlt2;
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struct ice_prof_tcam prof;
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struct ice_prof_redir prof_redir;
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struct ice_es es;
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u8 overwrite; /* set to true to allow overwrite of table entries */
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u8 is_list_init;
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};
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enum ice_chg_type {
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ICE_TCAM_NONE = 0,
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ICE_PTG_ES_ADD,
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ICE_TCAM_ADD,
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ICE_VSIG_ADD,
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ICE_VSIG_REM,
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ICE_VSI_MOVE,
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};
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struct ice_chs_chg {
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struct list_head list_entry;
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enum ice_chg_type type;
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u8 add_ptg;
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u8 add_vsig;
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u8 add_tcam_idx;
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u8 add_prof;
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u16 ptype;
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u8 ptg;
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u8 prof_id;
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u16 vsi;
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u16 vsig;
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u16 orig_vsig;
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u16 tcam_idx;
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};
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#define ICE_FLOW_PTYPE_MAX ICE_XLT1_CNT
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#endif /* _ICE_FLEX_TYPE_H_ */
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