/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/*
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*
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* (C) COPYRIGHT 2014-2015, 2018-2022 ARM Limited. All rights reserved.
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*
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* This program is free software and is provided to you under the terms of the
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* GNU General Public License version 2 as published by the Free Software
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* Foundation, and any use by you of this program is subject to the terms
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* of such GNU license.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you can access it online at
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* http://www.gnu.org/licenses/gpl-2.0.html.
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*
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*/
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/**
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* DOC: Interface file for accessing MMU hardware functionality
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*
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* This module provides an abstraction for accessing the functionality provided
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* by the midgard MMU and thus allows all MMU HW access to be contained within
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* one common place and allows for different backends (implementations) to
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* be provided.
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*/
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#ifndef _KBASE_MMU_HW_H_
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#define _KBASE_MMU_HW_H_
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#include "mali_kbase_mmu.h"
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/* Forward declarations */
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struct kbase_device;
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struct kbase_as;
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struct kbase_context;
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/**
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* enum kbase_mmu_fault_type - MMU fault type descriptor.
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* @KBASE_MMU_FAULT_TYPE_UNKNOWN: unknown fault
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* @KBASE_MMU_FAULT_TYPE_PAGE: page fault
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* @KBASE_MMU_FAULT_TYPE_BUS: nus fault
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* @KBASE_MMU_FAULT_TYPE_PAGE_UNEXPECTED: page_unexpected fault
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* @KBASE_MMU_FAULT_TYPE_BUS_UNEXPECTED: bus_unexpected fault
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*/
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enum kbase_mmu_fault_type {
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KBASE_MMU_FAULT_TYPE_UNKNOWN = 0,
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KBASE_MMU_FAULT_TYPE_PAGE,
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KBASE_MMU_FAULT_TYPE_BUS,
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KBASE_MMU_FAULT_TYPE_PAGE_UNEXPECTED,
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KBASE_MMU_FAULT_TYPE_BUS_UNEXPECTED
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};
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/**
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* struct kbase_mmu_hw_op_param - parameters for kbase_mmu_hw_do_* functions
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* @vpfn: MMU Virtual Page Frame Number to start the operation on.
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* @nr: Number of pages to work on.
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* @op: Operation type (written to ASn_COMMAND).
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* @kctx_id: Kernel context ID for MMU command tracepoint.
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* @mmu_sync_info: Indicates whether this call is synchronous wrt MMU ops.
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* @flush_skip_levels: Page table levels to skip flushing. (Only
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* applicable if GPU supports feature)
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*/
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struct kbase_mmu_hw_op_param {
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u64 vpfn;
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u32 nr;
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enum kbase_mmu_op_type op;
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u32 kctx_id;
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enum kbase_caller_mmu_sync_info mmu_sync_info;
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u64 flush_skip_levels;
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};
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/**
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* kbase_mmu_hw_configure - Configure an address space for use.
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* @kbdev: kbase device to configure.
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* @as: address space to configure.
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*
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* Configure the MMU using the address space details setup in the
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* kbase_context structure.
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*/
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void kbase_mmu_hw_configure(struct kbase_device *kbdev,
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struct kbase_as *as);
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/**
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* kbase_mmu_hw_do_lock - Issue LOCK command to the MMU and program
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* the LOCKADDR register.
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*
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* @kbdev: Kbase device to issue the MMU operation on.
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* @as: Address space to issue the MMU operation on.
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* @op_param: Pointer to struct containing information about the MMU
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* operation to perform.
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*
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* hwaccess_lock needs to be held when calling this function.
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*
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* Return: 0 if issuing the command was successful, otherwise an error code.
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*/
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int kbase_mmu_hw_do_lock(struct kbase_device *kbdev, struct kbase_as *as,
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const struct kbase_mmu_hw_op_param *op_param);
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/**
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* kbase_mmu_hw_do_unlock_no_addr - Issue UNLOCK command to the MMU without
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* programming the LOCKADDR register and wait
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* for it to complete before returning.
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*
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* @kbdev: Kbase device to issue the MMU operation on.
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* @as: Address space to issue the MMU operation on.
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* @op_param: Pointer to struct containing information about the MMU
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* operation to perform.
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*
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* This function should be called for GPU where GPU command is used to flush
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* the cache(s) instead of MMU command.
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*
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* Return: 0 if issuing the command was successful, otherwise an error code.
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*/
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int kbase_mmu_hw_do_unlock_no_addr(struct kbase_device *kbdev, struct kbase_as *as,
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const struct kbase_mmu_hw_op_param *op_param);
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/**
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* kbase_mmu_hw_do_unlock - Issue UNLOCK command to the MMU and wait for it
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* to complete before returning.
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*
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* @kbdev: Kbase device to issue the MMU operation on.
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* @as: Address space to issue the MMU operation on.
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* @op_param: Pointer to struct containing information about the MMU
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* operation to perform.
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*
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* Return: 0 if issuing the command was successful, otherwise an error code.
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*/
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int kbase_mmu_hw_do_unlock(struct kbase_device *kbdev, struct kbase_as *as,
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const struct kbase_mmu_hw_op_param *op_param);
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/**
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* kbase_mmu_hw_do_flush - Issue a flush operation to the MMU.
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*
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* @kbdev: Kbase device to issue the MMU operation on.
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* @as: Address space to issue the MMU operation on.
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* @op_param: Pointer to struct containing information about the MMU
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* operation to perform.
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*
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* Issue a flush operation on the address space as per the information
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* specified inside @op_param. This function should not be called for
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* GPUs where MMU command to flush the cache(s) is deprecated.
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* mmu_hw_mutex needs to be held when calling this function.
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*
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* Return: 0 if the operation was successful, non-zero otherwise.
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*/
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int kbase_mmu_hw_do_flush(struct kbase_device *kbdev, struct kbase_as *as,
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const struct kbase_mmu_hw_op_param *op_param);
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/**
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* kbase_mmu_hw_do_flush_locked - Issue a flush operation to the MMU.
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*
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* @kbdev: Kbase device to issue the MMU operation on.
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* @as: Address space to issue the MMU operation on.
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* @op_param: Pointer to struct containing information about the MMU
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* operation to perform.
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*
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* Issue a flush operation on the address space as per the information
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* specified inside @op_param. This function should not be called for
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* GPUs where MMU command to flush the cache(s) is deprecated.
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* Both mmu_hw_mutex and hwaccess_lock need to be held when calling this
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* function.
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*
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* Return: 0 if the operation was successful, non-zero otherwise.
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*/
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int kbase_mmu_hw_do_flush_locked(struct kbase_device *kbdev, struct kbase_as *as,
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const struct kbase_mmu_hw_op_param *op_param);
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/**
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* kbase_mmu_hw_do_flush_on_gpu_ctrl - Issue a flush operation to the MMU.
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*
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* @kbdev: Kbase device to issue the MMU operation on.
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* @as: Address space to issue the MMU operation on.
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* @op_param: Pointer to struct containing information about the MMU
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* operation to perform.
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*
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* Issue a flush operation on the address space as per the information
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* specified inside @op_param. GPU command is used to flush the cache(s)
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* instead of the MMU command.
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*
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* Return: 0 if the operation was successful, non-zero otherwise.
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*/
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int kbase_mmu_hw_do_flush_on_gpu_ctrl(struct kbase_device *kbdev, struct kbase_as *as,
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const struct kbase_mmu_hw_op_param *op_param);
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/**
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* kbase_mmu_hw_clear_fault - Clear a fault that has been previously reported by
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* the MMU.
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* @kbdev: kbase device to clear the fault from.
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* @as: address space to clear the fault from.
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* @type: The type of fault that needs to be cleared.
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*
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* Clear a bus error or page fault that has been reported by the MMU.
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*/
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void kbase_mmu_hw_clear_fault(struct kbase_device *kbdev, struct kbase_as *as,
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enum kbase_mmu_fault_type type);
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/**
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* kbase_mmu_hw_enable_fault - Enable fault that has been previously reported by
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* the MMU.
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* @kbdev: kbase device to again enable the fault from.
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* @as: address space to again enable the fault from.
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* @type: The type of fault that needs to be enabled again.
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*
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* After a page fault or bus error has been reported by the MMU these
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* will be disabled. After these are handled this function needs to be
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* called to enable the page fault or bus error fault again.
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*/
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void kbase_mmu_hw_enable_fault(struct kbase_device *kbdev, struct kbase_as *as,
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enum kbase_mmu_fault_type type);
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#endif /* _KBASE_MMU_HW_H_ */
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