/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/*
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*
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* (C) COPYRIGHT 2020-2022 ARM Limited. All rights reserved.
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*
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* This program is free software and is provided to you under the terms of the
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* GNU General Public License version 2 as published by the Free Software
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* Foundation, and any use by you of this program is subject to the terms
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* of such GNU license.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you can access it online at
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* http://www.gnu.org/licenses/gpl-2.0.html.
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*
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*/
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#ifndef _KBASE_CSF_IPA_CONTROL_H_
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#define _KBASE_CSF_IPA_CONTROL_H_
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#include <mali_kbase.h>
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/*
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* Maximum index accepted to configure an IPA Control performance counter.
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*/
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#define KBASE_IPA_CONTROL_CNT_MAX_IDX ((u8)64 * 3)
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/**
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* struct kbase_ipa_control_perf_counter - Performance counter description
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*
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* @scaling_factor: Scaling factor by which the counter's value shall be
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* multiplied. A scaling factor of 1 corresponds to units
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* of 1 second if values are normalised by GPU frequency.
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* @gpu_norm: Indicating whether counter values shall be normalized by
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* GPU frequency. If true, returned values represent
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* an interval of time expressed in seconds (when the scaling
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* factor is set to 1).
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* @type: Type of counter block for performance counter.
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* @idx: Index of the performance counter inside the block.
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* It may be dependent on GPU architecture.
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* It cannot be greater than KBASE_IPA_CONTROL_CNT_MAX_IDX.
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*
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* This structure is used by clients of the IPA Control component to describe
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* a performance counter that they intend to read. The counter is identified
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* by block and index. In addition to that, the client also specifies how
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* values shall be represented. Raw values are a number of GPU cycles;
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* if normalized, they are divided by GPU frequency and become an interval
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* of time expressed in seconds, since the GPU frequency is given in Hz.
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* The client may specify a scaling factor to multiply counter values before
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* they are divided by frequency, in case the unit of time of 1 second is
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* too low in resolution. For instance: a scaling factor of 1000 implies
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* that the returned value is a time expressed in milliseconds; a scaling
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* factor of 1000 * 1000 implies that the returned value is a time expressed
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* in microseconds.
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*/
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struct kbase_ipa_control_perf_counter {
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u64 scaling_factor;
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bool gpu_norm;
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enum kbase_ipa_core_type type;
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u8 idx;
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};
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/**
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* kbase_ipa_control_init - Initialize the IPA Control component
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*
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* @kbdev: Pointer to Kbase device.
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*/
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void kbase_ipa_control_init(struct kbase_device *kbdev);
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/**
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* kbase_ipa_control_term - Terminate the IPA Control component
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*
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* @kbdev: Pointer to Kbase device.
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*/
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void kbase_ipa_control_term(struct kbase_device *kbdev);
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/**
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* kbase_ipa_control_register - Register a client to the IPA Control component
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*
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* @kbdev: Pointer to Kbase device.
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* @perf_counters: Array of performance counters the client intends to read.
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* For each counter the client specifies block, index,
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* scaling factor and whether it must be normalized by GPU
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* frequency.
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* @num_counters: Number of performance counters. It cannot exceed the total
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* number of counters that exist on the IPA Control interface.
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* @client: Handle to an opaque structure set by IPA Control if
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* the registration is successful. This handle identifies
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* a client's session and shall be provided in its future
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* queries.
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*
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* A client needs to subscribe to the IPA Control component by declaring which
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* performance counters it intends to read, and specifying a scaling factor
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* and whether normalization is requested for each performance counter.
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* The function shall configure the IPA Control interface accordingly and start
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* a session for the client that made the request. A unique handle is returned
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* if registration is successful in order to identify the client's session
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* and be used for future queries.
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*
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* Return: 0 on success, negative -errno on error
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*/
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int kbase_ipa_control_register(
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struct kbase_device *kbdev,
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const struct kbase_ipa_control_perf_counter *perf_counters,
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size_t num_counters, void **client);
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/**
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* kbase_ipa_control_unregister - Unregister a client from IPA Control
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*
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* @kbdev: Pointer to kbase device.
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* @client: Handle to an opaque structure that identifies the client session
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* to terminate, as returned by kbase_ipa_control_register.
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*
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* Return: 0 on success, negative -errno on error
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*/
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int kbase_ipa_control_unregister(struct kbase_device *kbdev,
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const void *client);
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/**
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* kbase_ipa_control_query - Query performance counters
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*
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* @kbdev: Pointer to kbase device.
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* @client: Handle to an opaque structure that identifies the client
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* session, as returned by kbase_ipa_control_register.
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* @values: Array of values queried from performance counters, whose
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* length depends on the number of counters requested at
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* the time of registration. Values are scaled and normalized
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* and represent the difference since the last query.
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* @num_values: Number of entries in the array of values that has been
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* passed by the caller. It must be at least equal to the
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* number of performance counters the client registered itself
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* to read.
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* @protected_time: Time spent in protected mode since last query,
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* expressed in nanoseconds. This pointer may be NULL if the
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* client doesn't want to know about this.
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*
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* A client that has already opened a session by registering itself to read
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* some performance counters may use this function to query the values of
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* those counters. The values returned are normalized by GPU frequency if
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* requested and then multiplied by the scaling factor provided at the time
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* of registration. Values always represent a difference since the last query.
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*
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* Performance counters are not updated while the GPU operates in protected
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* mode. For this reason, returned values may be unreliable if the GPU has
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* been in protected mode since the last query. The function returns success
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* in that case, but it also gives a measure of how much time has been spent
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* in protected mode.
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*
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* Return: 0 on success, negative -errno on error
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*/
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int kbase_ipa_control_query(struct kbase_device *kbdev, const void *client,
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u64 *values, size_t num_values,
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u64 *protected_time);
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/**
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* kbase_ipa_control_handle_gpu_power_on - Handle the GPU power on event
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*
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* @kbdev: Pointer to kbase device.
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*
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* This function is called after GPU has been powered and is ready for use.
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* After the GPU power on, IPA Control component needs to ensure that the
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* counters start incrementing again.
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*/
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void kbase_ipa_control_handle_gpu_power_on(struct kbase_device *kbdev);
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/**
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* kbase_ipa_control_handle_gpu_power_off - Handle the GPU power off event
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*
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* @kbdev: Pointer to kbase device.
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*
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* This function is called just before the GPU is powered off when it is still
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* ready for use.
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* IPA Control component needs to be aware of the GPU power off so that it can
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* handle the query from Clients appropriately and return meaningful values
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* to them.
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*/
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void kbase_ipa_control_handle_gpu_power_off(struct kbase_device *kbdev);
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/**
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* kbase_ipa_control_handle_gpu_reset_pre - Handle the pre GPU reset event
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*
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* @kbdev: Pointer to kbase device.
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*
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* This function is called when the GPU is about to be reset.
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*/
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void kbase_ipa_control_handle_gpu_reset_pre(struct kbase_device *kbdev);
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/**
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* kbase_ipa_control_handle_gpu_reset_post - Handle the post GPU reset event
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*
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* @kbdev: Pointer to kbase device.
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*
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* This function is called after the GPU has been reset.
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*/
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void kbase_ipa_control_handle_gpu_reset_post(struct kbase_device *kbdev);
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#ifdef KBASE_PM_RUNTIME
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/**
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* kbase_ipa_control_handle_gpu_sleep_enter - Handle the pre GPU Sleep event
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*
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* @kbdev: Pointer to kbase device.
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*
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* This function is called after MCU has been put to sleep state & L2 cache has
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* been powered down. The top level part of GPU is still powered up when this
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* function is called.
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*/
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void kbase_ipa_control_handle_gpu_sleep_enter(struct kbase_device *kbdev);
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/**
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* kbase_ipa_control_handle_gpu_sleep_exit - Handle the post GPU Sleep event
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*
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* @kbdev: Pointer to kbase device.
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*
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* This function is called when L2 needs to be powered up and MCU can exit the
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* sleep state. The top level part of GPU is powered up when this function is
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* called.
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*
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* This function must be called only if kbase_ipa_control_handle_gpu_sleep_enter()
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* was called previously.
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*/
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void kbase_ipa_control_handle_gpu_sleep_exit(struct kbase_device *kbdev);
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#endif
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#if MALI_UNIT_TEST
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/**
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* kbase_ipa_control_rate_change_notify_test - Notify GPU rate change
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* (only for testing)
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*
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* @kbdev: Pointer to kbase device.
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* @clk_index: Index of the clock for which the change has occurred.
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* @clk_rate_hz: Clock frequency(Hz).
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*
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* Notify the IPA Control component about a GPU rate change.
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*/
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void kbase_ipa_control_rate_change_notify_test(struct kbase_device *kbdev,
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u32 clk_index, u32 clk_rate_hz);
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#endif /* MALI_UNIT_TEST */
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/**
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* kbase_ipa_control_protm_entered - Tell IPA_CONTROL that protected mode
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* has been entered.
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*
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* @kbdev: Pointer to kbase device.
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*
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* This function provides a means through which IPA_CONTROL can be informed
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* that the GPU has entered protected mode. Since the GPU cannot access
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* performance counters while in this mode, this information is useful as
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* it implies (a) the values of these registers cannot change, so theres no
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* point trying to read them, and (b) IPA_CONTROL has a means through which
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* to record the duration of time the GPU is in protected mode, which can
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* then be forwarded on to clients, who may wish, for example, to assume
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* that the GPU was busy 100% of the time while in this mode.
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*/
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void kbase_ipa_control_protm_entered(struct kbase_device *kbdev);
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/**
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* kbase_ipa_control_protm_exited - Tell IPA_CONTROL that protected mode
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* has been exited.
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*
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* @kbdev: Pointer to kbase device
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*
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* This function provides a means through which IPA_CONTROL can be informed
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* that the GPU has exited from protected mode.
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*/
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void kbase_ipa_control_protm_exited(struct kbase_device *kbdev);
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#endif /* _KBASE_CSF_IPA_CONTROL_H_ */
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