/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright(c) 2013 - 2018 Intel Corporation. */
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#ifndef _I40E_OSDEP_H_
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#define _I40E_OSDEP_H_
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#include <linux/types.h>
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#include <linux/if_ether.h>
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#include <linux/if_vlan.h>
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#include <linux/tcp.h>
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#include <linux/pci.h>
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#include <linux/highuid.h>
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/* get readq/writeq support for 32 bit kernels, use the low-first version */
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#include <linux/io-64-nonatomic-lo-hi.h>
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/* File to be the magic between shared code and
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* actual OS primitives
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*/
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#define hw_dbg(hw, S, A...) \
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do { \
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dev_dbg(&((struct i40e_pf *)hw->back)->pdev->dev, S, ##A); \
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} while (0)
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#define wr32(a, reg, value) writel((value), ((a)->hw_addr + (reg)))
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#define rd32(a, reg) readl((a)->hw_addr + (reg))
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#define rd64(a, reg) readq((a)->hw_addr + (reg))
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#define i40e_flush(a) readl((a)->hw_addr + I40E_GLGEN_STAT)
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/* memory allocation tracking */
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struct i40e_dma_mem {
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void *va;
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dma_addr_t pa;
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u32 size;
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};
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#define i40e_allocate_dma_mem(h, m, unused, s, a) \
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i40e_allocate_dma_mem_d(h, m, s, a)
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#define i40e_free_dma_mem(h, m) i40e_free_dma_mem_d(h, m)
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struct i40e_virt_mem {
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void *va;
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u32 size;
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};
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#define i40e_allocate_virt_mem(h, m, s) i40e_allocate_virt_mem_d(h, m, s)
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#define i40e_free_virt_mem(h, m) i40e_free_virt_mem_d(h, m)
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#define i40e_debug(h, m, s, ...) \
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do { \
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if (((m) & (h)->debug_mask)) \
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pr_info("i40e %02x:%02x.%x " s, \
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(h)->bus.bus_id, (h)->bus.device, \
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(h)->bus.func, ##__VA_ARGS__); \
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} while (0)
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typedef enum i40e_status_code i40e_status;
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#endif /* _I40E_OSDEP_H_ */
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