// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2010 Google, Inc.
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* Author: Erik Gilling <konkers@android.com>
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*
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* Copyright (C) 2011-2017 NVIDIA Corporation
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*/
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#include "../dev.h"
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#include "../debug.h"
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#include "../cdma.h"
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#include "../channel.h"
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static void host1x_debug_show_channel_cdma(struct host1x *host,
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struct host1x_channel *ch,
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struct output *o)
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{
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struct host1x_cdma *cdma = &ch->cdma;
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u32 dmaput, dmaget, dmactrl;
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u32 offset, class;
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u32 ch_stat;
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dmaput = host1x_ch_readl(ch, HOST1X_CHANNEL_DMAPUT);
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dmaget = host1x_ch_readl(ch, HOST1X_CHANNEL_DMAGET);
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dmactrl = host1x_ch_readl(ch, HOST1X_CHANNEL_DMACTRL);
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offset = host1x_ch_readl(ch, HOST1X_CHANNEL_CMDP_OFFSET);
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class = host1x_ch_readl(ch, HOST1X_CHANNEL_CMDP_CLASS);
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ch_stat = host1x_ch_readl(ch, HOST1X_CHANNEL_CHANNELSTAT);
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host1x_debug_output(o, "%u-%s: ", ch->id, dev_name(ch->dev));
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if (dmactrl & HOST1X_CHANNEL_DMACTRL_DMASTOP ||
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!ch->cdma.push_buffer.mapped) {
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host1x_debug_output(o, "inactive\n\n");
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return;
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}
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if (class == HOST1X_CLASS_HOST1X && offset == HOST1X_UCLASS_WAIT_SYNCPT)
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host1x_debug_output(o, "waiting on syncpt\n");
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else
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host1x_debug_output(o, "active class %02x, offset %04x\n",
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class, offset);
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host1x_debug_output(o, "DMAPUT %08x, DMAGET %08x, DMACTL %08x\n",
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dmaput, dmaget, dmactrl);
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host1x_debug_output(o, "CHANNELSTAT %02x\n", ch_stat);
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show_channel_gathers(o, cdma);
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host1x_debug_output(o, "\n");
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}
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static void host1x_debug_show_channel_fifo(struct host1x *host,
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struct host1x_channel *ch,
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struct output *o)
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{
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#if HOST1X_HW <= 6
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u32 rd_ptr, wr_ptr, start, end;
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u32 payload = INVALID_PAYLOAD;
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unsigned int data_count = 0;
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#endif
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u32 val;
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host1x_debug_output(o, "%u: fifo:\n", ch->id);
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val = host1x_ch_readl(ch, HOST1X_CHANNEL_CMDFIFO_STAT);
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host1x_debug_output(o, "CMDFIFO_STAT %08x\n", val);
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if (val & HOST1X_CHANNEL_CMDFIFO_STAT_EMPTY) {
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host1x_debug_output(o, "[empty]\n");
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return;
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}
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val = host1x_ch_readl(ch, HOST1X_CHANNEL_CMDFIFO_RDATA);
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host1x_debug_output(o, "CMDFIFO_RDATA %08x\n", val);
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#if HOST1X_HW <= 6
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/* Peek pointer values are invalid during SLCG, so disable it */
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host1x_hypervisor_writel(host, 0x1, HOST1X_HV_ICG_EN_OVERRIDE);
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val = 0;
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val |= HOST1X_HV_CMDFIFO_PEEK_CTRL_ENABLE;
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val |= HOST1X_HV_CMDFIFO_PEEK_CTRL_CHANNEL(ch->id);
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host1x_hypervisor_writel(host, val, HOST1X_HV_CMDFIFO_PEEK_CTRL);
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val = host1x_hypervisor_readl(host, HOST1X_HV_CMDFIFO_PEEK_PTRS);
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rd_ptr = HOST1X_HV_CMDFIFO_PEEK_PTRS_RD_PTR_V(val);
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wr_ptr = HOST1X_HV_CMDFIFO_PEEK_PTRS_WR_PTR_V(val);
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val = host1x_hypervisor_readl(host, HOST1X_HV_CMDFIFO_SETUP(ch->id));
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start = HOST1X_HV_CMDFIFO_SETUP_BASE_V(val);
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end = HOST1X_HV_CMDFIFO_SETUP_LIMIT_V(val);
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do {
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val = 0;
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val |= HOST1X_HV_CMDFIFO_PEEK_CTRL_ENABLE;
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val |= HOST1X_HV_CMDFIFO_PEEK_CTRL_CHANNEL(ch->id);
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val |= HOST1X_HV_CMDFIFO_PEEK_CTRL_ADDR(rd_ptr);
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host1x_hypervisor_writel(host, val,
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HOST1X_HV_CMDFIFO_PEEK_CTRL);
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val = host1x_hypervisor_readl(host,
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HOST1X_HV_CMDFIFO_PEEK_READ);
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if (!data_count) {
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host1x_debug_output(o, "%03x 0x%08x: ",
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rd_ptr - start, val);
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data_count = show_channel_command(o, val, &payload);
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} else {
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host1x_debug_cont(o, "%08x%s", val,
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data_count > 1 ? ", " : "])\n");
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data_count--;
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}
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if (rd_ptr == end)
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rd_ptr = start;
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else
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rd_ptr++;
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} while (rd_ptr != wr_ptr);
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if (data_count)
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host1x_debug_cont(o, ", ...])\n");
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host1x_debug_output(o, "\n");
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host1x_hypervisor_writel(host, 0x0, HOST1X_HV_CMDFIFO_PEEK_CTRL);
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host1x_hypervisor_writel(host, 0x0, HOST1X_HV_ICG_EN_OVERRIDE);
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#endif
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}
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static void host1x_debug_show_mlocks(struct host1x *host, struct output *o)
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{
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/* TODO */
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}
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