// SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)
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/* Copyright(c) 2014 - 2020 Intel Corporation */
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/fs.h>
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#include <linux/slab.h>
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#include <linux/errno.h>
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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#include <linux/platform_device.h>
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#include <linux/workqueue.h>
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#include <linux/io.h>
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#include <adf_accel_devices.h>
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#include <adf_common_drv.h>
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#include <adf_cfg.h>
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#include "adf_dh895xcc_hw_data.h"
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static const struct pci_device_id adf_pci_tbl[] = {
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QAT_DH895XCC), },
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{ }
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};
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MODULE_DEVICE_TABLE(pci, adf_pci_tbl);
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static int adf_probe(struct pci_dev *dev, const struct pci_device_id *ent);
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static void adf_remove(struct pci_dev *dev);
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static struct pci_driver adf_driver = {
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.id_table = adf_pci_tbl,
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.name = ADF_DH895XCC_DEVICE_NAME,
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.probe = adf_probe,
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.remove = adf_remove,
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.sriov_configure = adf_sriov_configure,
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};
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static void adf_cleanup_pci_dev(struct adf_accel_dev *accel_dev)
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{
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pci_release_regions(accel_dev->accel_pci_dev.pci_dev);
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pci_disable_device(accel_dev->accel_pci_dev.pci_dev);
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}
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static void adf_cleanup_accel(struct adf_accel_dev *accel_dev)
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{
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struct adf_accel_pci *accel_pci_dev = &accel_dev->accel_pci_dev;
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int i;
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for (i = 0; i < ADF_PCI_MAX_BARS; i++) {
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struct adf_bar *bar = &accel_pci_dev->pci_bars[i];
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if (bar->virt_addr)
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pci_iounmap(accel_pci_dev->pci_dev, bar->virt_addr);
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}
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if (accel_dev->hw_device) {
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switch (accel_pci_dev->pci_dev->device) {
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case PCI_DEVICE_ID_INTEL_QAT_DH895XCC:
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adf_clean_hw_data_dh895xcc(accel_dev->hw_device);
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break;
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default:
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break;
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}
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kfree(accel_dev->hw_device);
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accel_dev->hw_device = NULL;
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}
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adf_cfg_dev_remove(accel_dev);
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debugfs_remove(accel_dev->debugfs_dir);
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adf_devmgr_rm_dev(accel_dev, NULL);
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}
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static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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struct adf_accel_dev *accel_dev;
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struct adf_accel_pci *accel_pci_dev;
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struct adf_hw_device_data *hw_data;
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char name[ADF_DEVICE_NAME_LENGTH];
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unsigned int i, bar_nr;
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unsigned long bar_mask;
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int ret;
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switch (ent->device) {
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case PCI_DEVICE_ID_INTEL_QAT_DH895XCC:
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break;
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default:
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dev_err(&pdev->dev, "Invalid device 0x%x.\n", ent->device);
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return -ENODEV;
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}
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if (num_possible_nodes() > 1 && dev_to_node(&pdev->dev) < 0) {
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/* If the accelerator is connected to a node with no memory
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* there is no point in using the accelerator since the remote
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* memory transaction will be very slow. */
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dev_err(&pdev->dev, "Invalid NUMA configuration.\n");
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return -EINVAL;
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}
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accel_dev = kzalloc_node(sizeof(*accel_dev), GFP_KERNEL,
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dev_to_node(&pdev->dev));
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if (!accel_dev)
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return -ENOMEM;
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INIT_LIST_HEAD(&accel_dev->crypto_list);
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accel_pci_dev = &accel_dev->accel_pci_dev;
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accel_pci_dev->pci_dev = pdev;
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/* Add accel device to accel table.
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* This should be called before adf_cleanup_accel is called */
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if (adf_devmgr_add_dev(accel_dev, NULL)) {
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dev_err(&pdev->dev, "Failed to add new accelerator device.\n");
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kfree(accel_dev);
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return -EFAULT;
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}
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accel_dev->owner = THIS_MODULE;
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/* Allocate and configure device configuration structure */
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hw_data = kzalloc_node(sizeof(*hw_data), GFP_KERNEL,
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dev_to_node(&pdev->dev));
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if (!hw_data) {
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ret = -ENOMEM;
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goto out_err;
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}
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accel_dev->hw_device = hw_data;
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adf_init_hw_data_dh895xcc(accel_dev->hw_device);
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pci_read_config_byte(pdev, PCI_REVISION_ID, &accel_pci_dev->revid);
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pci_read_config_dword(pdev, ADF_DEVICE_FUSECTL_OFFSET,
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&hw_data->fuses);
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/* Get Accelerators and Accelerators Engines masks */
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hw_data->accel_mask = hw_data->get_accel_mask(hw_data->fuses);
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hw_data->ae_mask = hw_data->get_ae_mask(hw_data->fuses);
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accel_pci_dev->sku = hw_data->get_sku(hw_data);
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/* If the device has no acceleration engines then ignore it. */
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if (!hw_data->accel_mask || !hw_data->ae_mask ||
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((~hw_data->ae_mask) & 0x01)) {
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dev_err(&pdev->dev, "No acceleration units found");
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ret = -EFAULT;
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goto out_err;
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}
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/* Create dev top level debugfs entry */
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snprintf(name, sizeof(name), "%s%s_%s", ADF_DEVICE_NAME_PREFIX,
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hw_data->dev_class->name, pci_name(pdev));
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accel_dev->debugfs_dir = debugfs_create_dir(name, NULL);
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/* Create device configuration table */
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ret = adf_cfg_dev_add(accel_dev);
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if (ret)
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goto out_err;
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pcie_set_readrq(pdev, 1024);
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/* enable PCI device */
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if (pci_enable_device(pdev)) {
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ret = -EFAULT;
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goto out_err;
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}
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/* set dma identifier */
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if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
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if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) {
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dev_err(&pdev->dev, "No usable DMA configuration\n");
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ret = -EFAULT;
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goto out_err_disable;
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} else {
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pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
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}
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} else {
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pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
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}
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if (pci_request_regions(pdev, ADF_DH895XCC_DEVICE_NAME)) {
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ret = -EFAULT;
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goto out_err_disable;
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}
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/* Read accelerator capabilities mask */
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pci_read_config_dword(pdev, ADF_DEVICE_LEGFUSE_OFFSET,
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&hw_data->accel_capabilities_mask);
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/* Find and map all the device's BARS */
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i = 0;
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bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);
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for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) {
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struct adf_bar *bar = &accel_pci_dev->pci_bars[i++];
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bar->base_addr = pci_resource_start(pdev, bar_nr);
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if (!bar->base_addr)
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break;
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bar->size = pci_resource_len(pdev, bar_nr);
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bar->virt_addr = pci_iomap(accel_pci_dev->pci_dev, bar_nr, 0);
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if (!bar->virt_addr) {
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dev_err(&pdev->dev, "Failed to map BAR %d\n", bar_nr);
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ret = -EFAULT;
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goto out_err_free_reg;
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}
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}
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pci_set_master(pdev);
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if (adf_enable_aer(accel_dev)) {
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dev_err(&pdev->dev, "Failed to enable aer\n");
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ret = -EFAULT;
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goto out_err_free_reg;
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}
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if (pci_save_state(pdev)) {
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dev_err(&pdev->dev, "Failed to save pci state\n");
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ret = -ENOMEM;
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goto out_err_free_reg;
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}
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ret = qat_crypto_dev_config(accel_dev);
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if (ret)
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goto out_err_free_reg;
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ret = adf_dev_init(accel_dev);
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if (ret)
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goto out_err_dev_shutdown;
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ret = adf_dev_start(accel_dev);
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if (ret)
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goto out_err_dev_stop;
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return ret;
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out_err_dev_stop:
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adf_dev_stop(accel_dev);
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out_err_dev_shutdown:
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adf_dev_shutdown(accel_dev);
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out_err_free_reg:
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pci_release_regions(accel_pci_dev->pci_dev);
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out_err_disable:
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pci_disable_device(accel_pci_dev->pci_dev);
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out_err:
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adf_cleanup_accel(accel_dev);
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kfree(accel_dev);
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return ret;
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}
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static void adf_remove(struct pci_dev *pdev)
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{
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struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);
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if (!accel_dev) {
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pr_err("QAT: Driver removal failed\n");
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return;
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}
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adf_dev_stop(accel_dev);
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adf_dev_shutdown(accel_dev);
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adf_disable_aer(accel_dev);
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adf_cleanup_accel(accel_dev);
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adf_cleanup_pci_dev(accel_dev);
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kfree(accel_dev);
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}
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static int __init adfdrv_init(void)
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{
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request_module("intel_qat");
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if (pci_register_driver(&adf_driver)) {
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pr_err("QAT: Driver initialization failed\n");
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return -EFAULT;
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}
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return 0;
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}
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static void __exit adfdrv_release(void)
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{
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pci_unregister_driver(&adf_driver);
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}
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module_init(adfdrv_init);
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module_exit(adfdrv_release);
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MODULE_LICENSE("Dual BSD/GPL");
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MODULE_AUTHOR("Intel");
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MODULE_FIRMWARE(ADF_DH895XCC_FW);
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MODULE_FIRMWARE(ADF_DH895XCC_MMP);
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MODULE_DESCRIPTION("Intel(R) QuickAssist Technology");
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MODULE_VERSION(ADF_DRV_VERSION);
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