/*
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* Copyright (C) 2016 Atmel Corporation
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* Wenyou.Yang <wenyou.yang@atmel.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <clk-uclass.h>
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#include <dm.h>
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DECLARE_GLOBAL_DATA_PTR;
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static ulong at91_master_clk_get_rate(struct clk *clk)
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{
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return gd->arch.mck_rate_hz;
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}
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static struct clk_ops at91_master_clk_ops = {
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.get_rate = at91_master_clk_get_rate,
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};
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static const struct udevice_id at91_master_clk_match[] = {
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{ .compatible = "atmel,at91rm9200-clk-master" },
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{ .compatible = "atmel,at91sam9x5-clk-master" },
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{}
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};
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U_BOOT_DRIVER(at91_master_clk) = {
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.name = "at91-master-clk",
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.id = UCLASS_CLK,
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.of_match = at91_master_clk_match,
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.ops = &at91_master_clk_ops,
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};
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